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CD54HC640_08 Datasheet, PDF (5/12 Pages) Texas Instruments – High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inverting
◁
CD54HC640, CD74HC640, CD54HCT640, CD74HCT640
Switching Specifications CL = 50pF, Input tr, tf = 6ns
PARAMETER
HC TYPES
TEST
SYMBOL CONDITIONS VCC (V) MIN
25oC
TYP MAX
-40oC TO
85oC
MIN MAX
-55oC TO
125oC
MIN MAX UNITS
Propagation Delay
A to B
B to A
tPHL, tPLH CL = 50pF
2
-
-
90
-
115
-
135 ns
4.5
-
-
18
-
23
-
27
ns
CL = 15pF
5
CL = 50pF
6
Output High-Z
To High Level,
To Low Level
tPHL, tPLH CL = 50pF
2
4.5
CL = 15pF
5
CL = 50pF
6
Output High Level
tPHZ, tPLZ CL = 50pF
2
Output Low Level to High Z
4.5
-
7
-
-
-
-
-
-
15
-
20
-
-
-
150
-
190
-
-
-
30
-
38
-
-
12
-
-
-
-
-
-
26
-
33
-
-
-
150
-
190
-
-
-
30
-
38
-
-
ns
23
ns
225 ns
45
ns
-
ns
38
ns
225 ns
45
ns
Output Transition Time
CL = 15pF
5
-
12
-
-
-
-
-
ns
CL = 50pF
6
-
-
26
-
33
-
38
ns
tTHL, tTLH CL = 50pF
2
-
-
60
-
75
-
90
ns
4.5
-
-
12
-
15
-
18
ns
6
-
-
10
-
13
-
15
ns
Input Capacitance
Three-State Output
Capacitance
CIN
CL = 50pF
-
10
-
10
-
10
-
10
pF
CO
-
-
-
-
20
-
20
-
20
pF
Power Dissipation Capacitance CPD
-
(Notes 3, 4)
5
-
38
-
-
-
-
-
pF
HCT TYPES
Propagation Delay
A to B
B to A
Output High-Z
To High Level,
To Low Level
tPHL, tPLH CL = 50pF
4.5
-
-
22
-
28
-
33
ns
CL = 15pF
5
-
9
-
-
-
-
-
ns
tPHL, tPLH CL = 50pF
4.5
-
-
30
-
38
-
45
ns
CL = 15pF
5
-
12
-
-
-
-
-
ns
Output High Level
tPHZ, tPLZ CL = 50pF
4.5
-
-
30
-
38
-
45
ns
Output Low Level to High Z
CL = 15pF
5
-
12
-
-
-
-
-
ns
Output Transition Time
tTHL, tTLH CL = 50pF
4.5
-
-
12
-
15
-
18
ns
Input Capacitance
CIN
CL = 50pF
-
10
-
10
-
10
-
10
pF
Three-State Output
Capacitance
CO
-
-
-
-
20
-
20
-
20
pF
Power Dissipation Capacitance CPD
-
(Notes 3, 4)
5
-
41
-
-
-
-
-
pF
NOTES:
3. CPD is used to determine the dynamic power consumption, per channel.
4. PD = VCC2 fi (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
5
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