CD54HC139_07 Datasheet, PDF (5/13 Pages) Texas Instruments – High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer

CD54HC139, CD74HC139, CD54HCT139, CD74HCT139
Switching Specifications Input t_r, t_f = 6ns (Continued)
PARAMETER
TEST
V_CC
SYMBOL CONDITIONS (V)
25^oC
-40^oC TO
85^oC
MIN TYP MAX MIN MAX
-55^oC TO
125^oC
MIN MAX UNITS
Output Transition Time (Figure 1) t_TLH, t_THL C_L = 50pF
2
-
-
75
-
95
-
110 ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Power Dissipation
Capacitance, (Notes 3, 4)
C_PD
-
5
-
55
-
-
-
-
-
pF
Input Capacitance
HCT TYPES
Propagation Delay
C_IN
-
-
-
-
10
-
10
-
10
pF
A0, A1 to Outputs
E to Outputs
Select to Output
Enable to Output
Output Transition Time
(Figure 2)
t_PLH,
C_L = 50pF
4.5
-
-
34
-
43
-
51
ns
t_PHL
t_PLH,
C_L = 50pF
4.5
-
-
34
-
43
-
51
ns
t_PHL
t_PLH, t_PHL C_L = 15pF
5
-
14
-
-
-
-
-
ns
t_PLH, t_PHL C_L = 15pF
5
-
14
-
-
-
-
-
ns
t_TLH, t_THL C_L = 50pF
4.5
-
-
15
-
19
-
22
ns
Power Dissipation
Capacitance, (Notes 3, 4)
C_PD
-
5
-
59
-
-
-
-
-
pF
Input Capacitance
C_IN
-
-
-
-
10
-
10
-
NOTES:
3. C_PD is used to determine the dynamic power consumption, per decoder/demux.
4. P_D = V_CC2 f_i (C_PD + C_L) where: f_i = Input Frequency, C_L = Output Load Capacitance, V_CC = Supply Voltage.
10
pF
Test Circuits and Waveforms
t_r = 6ns
INPUT
90%
50%
10%
t_f = 6ns
V_CC
GND
t_THL
INVERTING
OUTPUT
t_PHL
t_TLH
90%
50%
10%
t_PLH
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
t_r = 6ns
INPUT
2.7V
1.3V
0.3V
t_f = 6ns
3V
GND
t_THL
INVERTING
OUTPUT
t_PHL
t_TLH
90%
1.3V
10%
t_PLH
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
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