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CD54HC132 Datasheet, PDF (5/10 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger
CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
HCT Input Loading Table
INPUT
UNIT LOADS
nA, nB
0.6
NOTE: Unit Load is ∆ICC limit
tions table, e.g. 360µA max at
specified
25oC.
in
DC
Electrical
Specifica-
Switching Specifications Input tr, tf = 6ns
PARAMETER
TEST
VCC
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Propagation Delay
A, B to Y (Figure 1)
tPLH, tPHL CL = 50pF
2
-
- 125
-
156
-
188
ns
4.5 -
-
25
-
31
-
38
ns
6
-
- 21
-
27
-
32
ns
Propagation Delay
A, B to Y
tTLH, tTHL CL = 15pF
5
- 10 -
-
-
-
-
pF
Transition Times (Figure 1)
tTLH, tTHL CL = 50pF
2
-
- 75
-
95
-
110
ns
4.5 -
-
15
-
19
-
22
ns
6
-
- 13
-
16
-
19
ns
Input Capacitance
Power Dissipation Capacitance
(Notes 4, 5)
CI
CPD
-
-
-
-
10
-
10
-
10
pF
-
5
- 30 -
-
-
-
-
pF
HCT TYPES
Propagation Delay
A, B to Y
(Figure 2)
tPHL, tPHL CL = 50pF
4.5 -
-
33
-
41
-
50
ns
Propagation Delay
A, B to Y
tPLH, tPHL CL = 15pF
5
- 13 -
-
-
-
-
pF
Transition Times (Figure 2)
tTLH, tTHL CL = 50pF
4.5 -
-
15
-
19
-
22
ns
Input Capacitance
CI
-
-
-
-
10
-
10
-
10
pF
Power Dissipation Capacitance
(Notes 4, 5)
CPD
-
5
- 30 -
-
-
-
-
pF
NOTES:
4. CPD is used to determine the dynamic power consumption, per gate.
5. PD = VCC2 fi (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
5