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CD54HC109_08 Datasheet, PDF (5/15 Pages) Texas Instruments – Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger
◁
CD54HC109, CD74HC109, CD54HCT109, CD74HCT109
Prerequisite For Switching Specifications
PARAMETER
TEST
VCC
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Setup Time J, K, to CP
tSU
-
2 80 -
-
100
-
120
-
ns
4.5 16 -
-
20
-
24
-
ns
6 14 -
-
17
-
20
-
ns
Hold Time J, K, to CP
tH
-
2
5
-
-
5
-
5
-
ns
4.5 5 -
-
5
-
5
-
ns
6
5
-
-
5
-
5
-
ns
Removal Time R, S, to CP
tREM
-
2 80 -
-
100
-
120
-
ns
4.5 16 -
-
20
-
24
-
ns
6 14 -
-
17
-
20
-
ns
Pulse Width CP, R, S
tW
-
2 80 -
-
100
-
120
-
ns
4.5 16 -
-
20
-
24
-
ns
6 14 -
-
17
-
20
-
ns
CP Frequency
fMAX
-
2
6
-
-
5
-
4
-
MHz
4.5 30 -
-
25
-
20
-
MHz
6 35 -
-
29
-
23
-
MHz
HCT TYPES
Setup Time J, K to CP
Hold Time J, K to CP
Removal Time R, S, to CP
Pulse Width CP, R, S
CP Frequency
tSU
tH
tREM
tW
fMAX
-
4.5 18 -
-
23
-
27
-
ns
-
4.5 3 -
-
3
-
3
-
ns
-
4.5 18 -
-
23
-
27
-
ns
-
4.5 18 -
-
23
-
27
-
ns
-
4.5 27 -
-
22
-
18
-
MHz
Switching Specifications Input tr, tf = 6ns
PARAMETER
TEST
VCC
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Propagation Delay,
CP → Q, Q
Propagation Delay,
S→Q
Propagation Delay,
S→Q
tPLH, tPHL CL = 50pF
2
-
- 175
-
220
-
265
ns
CL = 50pF
4.5 -
-
35
-
44
-
53
ns
CL = 15pF
5
- 14 -
-
-
-
-
ns
CL = 50pF
6
-
- 30
-
37
-
45
ns
tPLH, tPHL CL = 50pF
2
-
- 120
-
150
-
180
ns
CL = 50pF
4.5 -
-
24
-
30
-
36
ns
CL = 15pF
5
-9
-
-
-
-
-
ns
CL = 50pF
6
-
- 20
-
26
-
31
ns
tPLH, tPHL CL = 50pF
2
-
- 155
-
195
-
235
ns
CL = 50pF
4.5 -
-
31
-
39
-
47
ns
CL = 15pF
5
- 13 -
-
-
-
-
ns
CL = 50pF
6
-
- 26
-
33
-
40
ns
5
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