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TSB43AA22 Datasheet, PDF (47/100 Pages) Texas Instruments – INTEGRATED 1394A 2000 OHCI PHY LINK LAYER CONTROLLER
4.12 Configuration ROM Mapping Register
The configuration ROM mapping register contains the start address within system memory that maps to the start
address of 1394 configuration ROM for this node. See Table 4–8 for a complete description of the register contents.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name
Configuration ROM mapping
Type
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Default 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Name
Configuration ROM mapping
Type
R/W R/W R/W R/W R/W R/W R
R
R
R
R
R
R
R
R
R
Default 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT
31–10
9–0
Register:
Offset:
Type:
Default:
Configuration ROM mapping
34h
Read/Write
0000 0000h
Table 4–8. Configuration ROM Mapping Register Description
FIELD NAME
configROMaddr
RSVD
TYPE
R/W
R
DESCRIPTION
If a quadlet read request to 1394 offset FFFF F000 0400h through offset FFFF F000 07FFh is
received, then the low-order 10 bits of the offset are added to this register to determine the host memory
address of the read request.
Reserved. Bits 9–0 return 0s when read.
4.13 Posted Write Address Low Register
The posted write address low register is used to communicate error information if a write request is posted and an
error occurs while the posted data packet is being written. See Table 4–9 for a complete description of the register
contents.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name
Posted write address low
Type
RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU
Default X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bit
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Name
Posted write address low
Type
RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU
Default X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Register:
Offset:
Type:
Default:
Posted write address low
38h
Read/Update
XXXX XXXXh
Table 4–9. Posted Write Address Low Register Description
BIT
31–0
FIELD NAME
offsetLo
TYPE
DESCRIPTION
RU The lower 32 bits of the 1394 destination offset of the write request that failed.
4–11