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TMS320C6701 Datasheet, PDF (47/70 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR
TMS320C6701
FLOATING-POINT DIGITAL SIGNAL PROCESSOR
RESET TIMING (CONTINUED)
SPRS067F − MAY 1998 − REVISED MARCH 2004
CLKOUT1
1
2
2
RESET
3
4
CLKOUT2
5
6
SDCLK
7
8
SSCLK
9
10
LOW GROUP†‡
11
12
HIGH GROUP†‡
13
14
Z GROUP†‡
† Low group consists of:
IACK, INUM[3:0], DMAC[3:0], PD, TOUT0, and TOUT1.
High group consists of:
HINT.
Z group consists of:
EA[21:2], ED[31:0], CE[3:0], BE[3:0], ARE, AWE, AOE, SSADS, SSOE, SSWE, SDA10, SDRAS, SDCAS,
SDWE, HD[15:0], CLKX0, CLKX1, FSX0, FSX1, DX0, DX1, CLKR0, CLKR1, FSR0, and FSR1.
‡ HRDY is gated by input HCS.
If HCS = 0 at device reset, HRDY belongs to the high group.
If HCS = 1 at device reset, HRDY belongs to the low group.
Figure 27. Reset Timing
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