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MSP430X43X1_08 Datasheet, PDF (47/73 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430x43x1, MSP430x43x, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344F − JANUARY 2002 − REVISED MAY 2007
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, power supply and input range conditions (see Note 1)
AVCC
V(P6.x/Ax)
PARAMETER
Analog supply voltage
Analog input voltage
range (see Note 2)
TEST CONDITIONS
VCC
AVCC and DVCC are connected together
AVSS and DVSS are connected together
V(AVSS) = V(DVSS) = 0 V
All P6.0/A0 to P6.7/A7 terminals. Analog inputs
selected in ADC12MCTLx register and P6Sel.x=1
0 ≤ x ≤ 7; V(AVSS) ≤ VP6.x/Ax ≤ V(AVCC)
MIN NOM MAX UNIT
2.2
3.6 V
0
VAVCC
V
IADC12
Operating supply current
into AVCC terminal
(see Note 3)
fADC12CLK = 5.0 MHz
ADC12ON = 1, REFON = 0
SHT0=0, SHT1=0, ADC12DIV=0
2.2 V
3V
0.65
1.3
mA
0.8
1.6
IREF+
Operating supply current
into AVCC terminal
(see Note 4)
fADC12CLK = 5.0 MHz
ADC12ON = 0,
REFON = 1, REF2_5V = 1
fADC12CLK = 5.0 MHz
ADC12ON = 0,
REFON = 1, REF2_5V = 0
3V
2.2 V
3V
0.5
0.8 mA
0.5
0.8
mA
0.5
0.8
Only one terminal can be selected
CI
Input capacitance
at one time, P6.x/Ax
2.2 V
40 pF
RI
NOTES:
Input MUX ON resistance 0V ≤ VAx ≤ VAVCC
3V
2000 Ω
1. The leakage current is defined in the leakage current table with P6.x/Ax parameter.
2. The analog input voltage range must be within the selected reference voltage range VR+ to VR− for valid conversion results.
3. The internal reference supply current is not included in current consumption parameter IADC12.
4. The internal reference current is supplied via terminal AVCC. Consumption is independent of the ADC12ON control bit, unless a
conversion is active. The REFON bit enables to settle the built-in reference before starting an A/D conversion.
12-bit ADC, external reference (see Note 1)
VeREF+
PARAMETER
Positive external
reference voltage input
TEST CONDITIONS
VeREF+ > VREF−/VeREF− (see Note 2)
VCC
MIN NOM MAX UNIT
1.4
VAVCC
V
VREF− /VeREF−
Negative external
reference voltage input
VeREF+ > VREF−/VeREF− (see Note 3)
0
1.2 V
(VeREF+ −
VREF−/VeREF−)
Differential external
reference voltage input VeREF+ > VREF−/VeREF− (see Note 4)
1.4
VAVCC
V
IVeREF+
Static input current
0V ≤VeREF+ ≤ VAVCC
2.2 V/3 V
±1 μA
IVREF−/VeREF−
Static input current
0V ≤ VeREF− ≤ VAVCC
2.2 V/3 V
±1 μA
NOTES:
1. The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, Ci, is also
the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 12-bit accuracy.
2. The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
3. The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
4. The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.
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