LM3S8630_1 Datasheet, PDF (47/550 Pages) Texas Instruments – Stellaris® LM3S8630 Microcontroller

Stellaris® LM3S8630 Microcontroller
Table 3-1. Memory Map (continued)
Start
End
0x4004.1000
0x4004.8000
0x4004.9000
0x400F.C000
0x400F.D000
0x400F.E000
0x400F.F000
0x4200.0000
0x4400.0000
Private Peripheral Bus
0xE000.0000
0x4004.7FFF
0x4004.8FFF
0x400F.BFFF
0x400F.CFFF
0x400F.DFFF
0x400F.EFFF
0x41FF.FFFF
0x43FF.FFFF
0xDFFF.FFFF
0xE000.0FFF
Description
Reserved
Ethernet Controller
Reserved
Hibernation Module
Flash control
System control
Reserved
Bit-banded alias of 0x4000.0000 through 0x400F.FFFF
Reserved
Instrumentation Trace Macrocell (ITM)
0xE000.1000
0xE000.1FFF
Data Watchpoint and Trace (DWT)
0xE000.2000
0xE000.2FFF
Flash Patch and Breakpoint (FPB)
0xE000.3000
0xE000.E000
0xE000.DFFF
0xE000.EFFF
Reserved
Nested Vectored Interrupt Controller (NVIC)
0xE000.F000
0xE004.0000
0xE003.FFFF
0xE004.0FFF
Reserved
Trace Port Interface Unit (TPIU)
0xE004.1000
0xFFFF.FFFF
Reserved
a. All reserved space returns a bus fault when read or written.
b. The unavailable flash will bus fault throughout this range.
c. The unavailable SRAM will bus fault throughout this range.
For details on
registers, see
page ...
-
443
-
132
149
76
-
-
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ARM®
Cortex™-M3
Technical
Reference
Manual
ARM®
Cortex™-M3
Technical
Reference
Manual
ARM®
Cortex™-M3
Technical
Reference
Manual
-
ARM®
Cortex™-M3
Technical
Reference
Manual
-
ARM®
Cortex™-M3
Technical
Reference
Manual
-
June 22, 2010
47
Texas Instruments-Production Data