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| TLV320AIC3104_15 Datasheet, PDF (45/95 Pages) Texas Instruments – TLV320AIC3104 Low-Power Stereo Audio Codec for Portable Audio and Telephony | |||
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TLV320AIC3104
SLAS510D â FEBRUARY 2007 â REVISED DECEMBER 2014
BIT READ/
WRITE
D7âD4 R/W
D3âD0 R/W
Table 8. Page 0/Register 2: Codec Sample Rate Select Register
RESET
VALUE
0000
0000
DESCRIPTION
ADC Sample Rate Select (1)
0000: ADC fS = fS(ref)/1
0001: ADC fS = fS(ref)/1.5
0010: ADC fS = fS(ref)/2
0011: ADC fS = fS(ref)/2.5
0100: ADC fS = fS(ref)/3
0101: ADC fS = fS(ref)/3.5
0110: ADC fS = fS(ref)/4
0111: ADC fS = fS(ref)/4.5
1000: ADC fS = fS(ref)/5
1001: ADC fS = fS(ref)/5.5
1010: ADC fS = fS(ref)/6
1011â1111: Reserved. Do not write these sequences.
DAC Sample Rate Select (1)
0000: DAC fS = fS(ref)/1
0001: DAC fS = fS(ref)/1.5
0010: DAC fS = fS(ref)/2
0011: DAC fS = fS(ref)/2.5
0100: DAC fS = fS(ref)/3
0101: DAC fS = fS(ref)/3.5
0110: DAC fS = fS(ref)/4
0111: DAC fS = fS(ref)/4.5
1000: DAC fS = fS(ref)/5
1001: DAC fS = fS(ref)/5.5
1010: DAC fS = fS(ref)/6
1011â1111 : Reserved, do not write these sequences.
(1) In the TLV320AIC3104, the ADC fS must be set equal to the DAC fS. This is done by setting the value of bits D7âD4 equal to the value
of bits D3âD0.
BIT READ/
WRITE
D7
R/W
D6âD3 R/W
D2âD0 R/W
Table 9. Page 0/Register 3: PLL Programming Register A
RESET
VALUE
0
0010
000
PLL Control Bit
0: PLL is disabled.
1: PLL is enabled.
PLL Q Value
0000: Q = 16
0001: Q = 17
0010: Q = 2
0011: Q = 3
0100: Q = 4
â¦
1110: Q = 14
1111: Q = 15
PLL P Value
000: P = 8
001: P = 1
010: P = 2
011: P = 3
100: P = 4
101: P = 5
110: P = 6
111: P = 7
DESCRIPTION
Copyright © 2007â2014, Texas Instruments Incorporated
Product Folder Links: TLV320AIC3104
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