MSC1210_08 Datasheet, PDF (45/94 Pages) Texas Instruments – Precision Analog-to-Digital Converter (ADC) with 8051 Microcontroller and Flash Memory

MSC1210
www.ti.com
Port 0 (P0)
SFR 80h
7
P0.7
6
P0.6
5
P0.5
4
P0.4
3
P0.3
SBAS203J − MARCH 2002 − REVISED JANUARY 2008
2
P0.2
1
P0.1
0
P0.0
Reset Value
FFh
P0.7−0
bits 7−0
Port 0. This port functions as a multiplexed address/data bus during external memory access, and as a general-
purpose I/O port when external memory access is not needed. During external memory cycles, this port will contain
the LSB of the address when ALE is HIGH, and Data when ALE is LOW. When used as a general-purpose I/O, this
port drive is selected by P0DDRL and P0DDRH (ACh, ADh). Whether Port 0 is used as general-purpose I/O or for
external memory access is determined by the Flash Configuration Register (HCR1.1)
Stack Pointer (SP)
SFR 81h
7
SP.7
6
SP.6
5
SP.5
4
SP.4
3
SP.3
2
SP.2
1
SP.1
0
SP.0
Reset Value
07h
SP.7−0
bits 7−0
Stack Pointer. The stack pointer identifies the location where the stack will begin. The stack pointer is incremented
before every PUSH or CALL operation and decremented after each POP or RET/RETI. This register defaults to 07h
after reset.
Data Pointer Low 0 (DPL0)
SFR 82h
7
DPL0.7
6
DPL0.6
5
DPL0.5
4
DPL0.4
3
DPL0.3
2
DPL0.2
1
DPL0.1
0
DPL0.0
Reset Value
00h
DPL0.7−0 Data Pointer Low 0. This register is the low byte of the standard 8051 16-bit data pointer. DPL0 and DPH0 are
bits 7−0 used to point to non-scratchpad data RAM. The current data pointer is selected by DPS (SFR 86h).
Data Pointer High 0 (DPH0)
SFR 83h
7
DPH0.7
6
DPH0.6
5
DPH0.5
4
DPH0.4
3
DPH0.3
2
DPH0.2
1
DPH0.1
0
DPH0.0
Reset Value
00h
DPH0.7−0 Data Pointer High 0. This register is the high byte of the standard 8051 16-bit data pointer. DPL0 and DPH0 are
bits 7−0 used to point to non-scratchpad data RAM. The current data pointer is selected by DPS (SFR 86h).
Data Pointer Low 1 (DPL1)
SFR 84h
7
DPL1.7
6
DPL1.6
5
DPL1.5
4
DPL1.4
3
DPL1.3
2
DPL1.2
1
DPL1.1
0
DPL1.0
Reset Value
00h
DPL1.7−0 Data Pointer Low 1. This register is the low byte of the auxiliary 16-bit data pointer. When the SEL bit (DPS.0,
bits 7−0 SFR 86h) is set, DPL1 and DPH1 are used in place of DPL0 and DPH0 during DPTR operations.
45