PCM3060_15 Datasheet, PDF (42/50 Pages) Texas Instruments – 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC

PCM3060
SLAS533B – MARCH 2007 – REVISED MARCH 2008
www.ti.com
Audio Interface Clocks
In slave mode, PCM3060 does not require specific timing relationship between BCK1/LRCK1 and SCKI1,
BCK2/LRCK2 and SCKI2, but there is a possibility of performance degradation with a certain timing relationship
between them. In that case, specific timing-relationship control might solve this performance degradation.
In master mode, there is a possibility of performance degradation due to heavy loads on BCK1/LRCK1,
BCK2/LRCK2 and DOUT. It is recommended to load these pins as lightly as possible.
External Mute Control
For power-down ON/OFF control without the pop noise which is generated by a dc level change on the DAC
output, the external mute control is generally required. Use of the following control sequence is recommended:
external mute ON, codec power down ON, SCKI1/SCKI2 stop and resume if necessary, codec power down OFF,
and external mute OFF.
xxxxxx
xxxxxx
xxxxxx
xxxxxx
REVISION HISTORY
Changes from Original (March 2007) to Revision A ....................................................................................................... Page
• Changed Figure 34(a), (b), and (c). Updated the Example of C, R values. ........................................................................ 40
Changes from Revision A (February 2008) to Revision B ............................................................................................. Page
• Changed Supply Current - f_S = 48 kHz/ADC, f_S = 48 kHz/DAC max value From: 30 mA To: 36 mA ................................... 6
• Changed Power dissipation - f_S = 48 kHz/ADC, f_S = 48 kHz/DAC max valueFrom: 190 mW To: 220 mW .......................... 6
42
Submit Documentation Feedback
Product Folder Link(s): PCM3060
Copyright © 2007–2008, Texas Instruments Incorporated