DAC7760_15 Datasheet, PDF (41/59 Pages) Texas Instruments – Single-Channel, 12- and 16-Bit Programmable Current Output and Voltage Output Digital-to-Analog Converters for 4-mA to 20-mA Current Loop Applications

DAC7760
DAC8760
www.ti.com
SBAS528A – JUNE 2013 – REVISED DECEMBER 2013
BOOST CONFIGURATION FOR IOUT
An external NPN transistor can be used as shown in Figure 88 to reduce power dissipation on the die. Most of
the load current flows through the NPN transistor with a small amount flowing through the on-chip PMOS
transistor based on the gain of the NPN transistor. This reduces the temperature induced drift on the die and
internal reference and is an option for use cases at the extreme end of the supply, load current, and ambient
temperature ranges. Resistor R₂ stabilizes this circuit for cases where the R_LOAD is a short or a very small load
like a multimeter. Recommended values for R₁, R₂ and C₁ in this circuit are 1 kΩ, 20 Ω and 0.22 µF. An
equivalent solution is to place R₂ (with a recommended value of 2 kΩ instead of the 20 Ω) in series with the base
of the transistor instead of the configuration shown in Figure 88. Note that there is some gain error introduced by
this configuration as seen in Figure 47 for the 0-24 mA range. It is recommended that the internal transistor be
used in most cases as the values in the ELECTRICAL CHARACTERISTICS are based on the configuration with
the internal on chip PMOS transitor.
BOOST
IOUT
DACx760
R2
R1
C1
GND
RLOAD
Figure 88. Boost Mode Configuration
FILTERING THE CURRENT OUTPUT (only on the QFN package)
The QFN package provides access to internal nodes of the circuit as shown in Figure 94. Capacitors can be
placed on these pins and AVDD to form a filter on the output current, reducing bandwidth and the slew rate of
the output. However, to achieve large reductions in slew rate, the programmable slew rate can be used to avoid
having to use large capacitors. Even in that case, the capacitors on CAP1 and CAP2 can be used to smooth out
the stairsteps caused by the digital code changes as shown in Figure 89. However, note that power supply ripple
will also couple into the part through these capacitors.
25
22
19
16
no cap
3 nF CAP1
13
3 nF CAP2
10 nF CAP1
10
10 nF CAP2
7
T_A = 25ºC
AVDD = 24 V
4
R_LOAD = 250 Ÿ
1
Time (200 µs/div)
C001
Figure 89. IOUT vs Time for Different Cap Values on CAP1 and CAP2
Copyright © 2013, Texas Instruments Incorporated
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