TPS3306-15DGKR Datasheet, PDF (4/18 Pages) Texas Instruments – DUAL PROCESSOR SUPERVISORY CIRCUITS WITH POWER-FAIL

TPS3306-15
TPS3306-18, TPS3306-20
TPS3306-25, TPS3306-33
SLVS290C – APRIL 2000 – REVISED DECEMBER 2006
www.ti.com
SENSEn
V_(nom)
V_IT
TIMING DIAGRAM
1.1 V
WDI
1
0
RESET
1
Undefined
Behavior
0
t_d
t
t_t(out)
t
t_d
t_d
RESET Because of a Power Drop Below V_IT–
RESET Because of Power-Up
Undefined
Behavior
t
RESET Because of
Power-Down
RESET Because of WDI
TERMINAL
NAME
NO.
GND
4
PFI
3
PFO
6
RESET
5
SENSE1 1
SENSE2 2
WDI
7
V_DD
8
Table 4. Terminal Functions
I/O
I Ground
I Power-fail comparator input
O Power-fail comparator output, open-drain
O Active-low reset output, open-drain
I Sense voltage input 1
I Sense voltage input 2
I Watchdog timer input
I Supply voltage
DESCRIPTION
DETAILED DESCRIPTION
Watchdog
In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also
important to ensure correct program execution. The task of a watchdog is to ensure that the program is not
stalled in an indefinite loop. The microprocessor, microcontroller, or DSP typically has to toggle the watchdog
input within 0.8 s to avoid a time-out occurring. Either a low-to-high or a high-to-low transition resets the internal
watchdog timer. If the input is unconnected or tied with a high impedance driver, the watchdog is disabled and
will be retriggered internally.
4
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