TL1466I Datasheet, PDF (4/24 Pages) Texas Instruments – HIGH-SPEED/PRECISION SIX CHANNEL SWITCHING REGULATOR CONTROLLER

TL1466I
HIGHĆSPEED/PRECISION SIX CHANNEL
SWITCHING REGULATOR CONTROLLER
SLVS262 − FEBRUARY 2000
Terminal Functions
TERMINAL
NAME
BOOT CAP.H−1
BOOT CAP.L−1
BOOT CAP.H−2
BOOT CAP.L−2
BOOT CAP.H−3
BOOT CAP.L−3
BOOT CAP.L−4
BOOT CAP.H−4
BOOT CAP.L−5
BOOT CAP.H−5
BOOT CAP.L−6
BOOT CAP.H−6
COMP
COMP−1
COMP−2
COMP−3
COMP−4
COMP−5
COMP−6
CT
DTC−3
FEEDBACK−1
FEEDBACK−2
FEEDBACK−3
FEEDBACK−4
FEEDBACK−5
FEEDBACK−6
GND
INV INPUT−1
INV INPUT−2
INV INPUT−3
INV INPUT−4
INV INPUT−5
INV INPUT−6
MOS DUTY
DESCRIPTION
NO.
44
Bootstrap capacitor connection. The connection allows reverse-bias for external PNP transistor of channel 1.
45
48
Bootstrap capacitor connection. The connection allows reverse-bias for external PNP transistor of channel 2.
49
54
Bootstrap capacitor connection. The connection allows reverse-bias for external PNP transistor of channel 3
55
58
Bootstrap capacitor connection. The connection allows reverse-bias for external PNP transistor of channel 4.
59
1
Bootstrap capacitor connection. The connection allows reverse-bias for external PNP transistor of channel 5.
2
5
Bootstrap capacitor connection. The connection allows reverse-bias for external PNP transistor of channel 6.
6
13
Output regulation voltage monitor terminal. When this terminal voltage drops below VREF voltage (1.5 V),
charging to capacitor connected to SCP terminal (pin 23) is initiated.
40
Output regulation voltage monitor terminal (channel 1). When this terminal voltage drops below VREF voltage
(1.5 V) charging to capacitor connected to SCP terminal (pin 23) is initiated.
Output regulation voltage monitor terminal (channel 2). When this terminal voltage drops below VREF voltage
37 _{(1.5 V) charging to capacitor connected to SCP terminal (pin 23) is initiated.}
34
Output regulation voltage monitor terminal (channel 3). When this terminal voltage drops below VREF voltage
(1.5 V), charging to capacitor connected to SCP terminal (pin 23) is initiated.
18
Output regulation voltage monitor terminal (channel 4). When this terminal voltage drops below VREF voltage
(1.5 V) charging to capacitor connected to SCP terminal (pin 23) is initiated.
Output regulation voltage monitor terminal (channel 5). When this terminal voltage drops below NONINV
14 _{INPUT−5 terminal voltage − 0.55 V, charging to capacitor connected to SCP terminal (pin 23) is initiated.}
9
Output regulation voltage monitor terminal (channel 6). When this terminal voltage drops below NONINV
INPUT−6 terminal voltage − 0.55 V, charging to capacitor connected to SCP terminal (pin 23) is initiated.
22 Timing capacitor connection for oscillation frequency setting.
31
Dead-time control input for channel 3. The maximum ON duty cycle for OUTPUT−3 terminal is determined by
comparing the input voltage of this terminal with the oscillator output (triangle wave).
38 Error amplifier output terminal (channel 1)
35 Error amplifier output terminal (channel 2)
32 Error amplifier output terminal (channel 3)
20 Error amplifier output terminal (channel 4)
17 Error amplifier output terminal (channel 5)
12 Error amplifier output terminal (channel 6)
25 Logic ground
39 Error amplifier inverting input terminal (channel 1)
36 Error amplifier inverting input terminal (channel 2)
33 Error amplifier inverting input terminal (channel 3)
19 Error amplifier inverting input terminal (channel 4)
16 Error amplifier inverting input terminal (channel 5)
11 Error amplifier inverting input terminal (channel 6)
N-channel MOSFET ON duty cycle setting for the synchronous rectification of channel 1 and 4. The MOSFET
24 ON duty cycle for the synchronous rectification is determined by the resistor value connected between this
terminal and GND.
4
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