SN74LVC2G74-Q1 Datasheet, PDF (4/10 Pages) Texas Instruments – SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

SN74LVC2G74-Q1
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES563B – MARCH 2004 – REVISED AUGUST 2006
Recommended Operating Conditions⁽¹⁾
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V_CC
Supply voltage
V_IH
High-level input voltage
V_IL
Low-level input voltage
V_I
Input voltage
V_O
Output voltage
I_OH
High-level output current
I_OL
Low-level output current
∆t/∆v Input transition rise or fall rate
T_A
Operating free-air temperature
Operating
Data retention only
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3 V to 3.6 V
V_CC = 4.5 V to 5.5 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 3 V to 3.6 V
V_CC = 4.5 V to 5.5 V
V_CC = 1.65 V
V_CC = 2.3 V
V_CC = 3 V
V_CC = 4.5 V
V_CC = 1.65 V
V_CC = 2.3 V
V_CC = 3 V
V_CC = 4.5 V
V_CC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
V_CC = 3.3 V ± 0.3 V
V_CC = 5 V ± 0.5 V
MIN
1.65
1.5
0.65 × V_CC
1.7
2
0.7 × V_CC
0
0
40
MAX
5.5
0.35 × V_CC
0.7
0.8
0.3 × V_CC
5.5
V_CC
–4
–8
–16
–24
–24
4
8
16
24
24
20
10
5
125
UNIT
V
V
V
V
V
mA
mA
ns/V
°C
(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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