SN74ALVCH32374 Datasheet, PDF (4/9 Pages) Texas Instruments – 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

SN74ALVCH32374
32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES283 – OCTOBER 1999
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VOH
IOH = –100 µA
IOH = –4 mA
IOH = –8 mA
IOH = –12 mA
TEST CONDITIONS
VCC
1.65 V to 3.6 V
1.65 V
2.3 V
2.7 V
3V
MIN TYP†
VCC–0.2
1.2
1.7
2.2
2.4
MAX
UNIT
V
IOH = –24 mA
3V
2.2
IOL = 100 µA
1.65 V to 3.6 V
IOL = 4 mA
1.65 V
VOL
IOL = 8 mA
2.3 V
IOL = 12 mA
2.7 V
IOL = 24 mA
3V
II
VI = VCC or GND
3.6 V
VI = 0.58 V
1.65 V
25
VI = 1.07 V
1.65 V
–25
VI = 0.7 V
2.3 V
45
II(hold)
VI = 1.7 V
2.3 V
–45
VI = 0.8 V
3V
75
VI = 2 V
VI = 0 to 3.6 V‡
3V
–75
3.6 V
IOZ
VO = VCC or GND
3.6 V
ICC
VI = VCC or GND,
IO = 0
3.6 V
∆ICC
One input at VCC – 0.6 V, Other inputs at VCC or GND 3 V to 3.6 V
Control inputs
Ci
Data inputs
VI = VCC or GND
3.3 V
0.2
0.45
0.7 V
0.4
0.55
±5 µA
µA
±500
±10 µA
40 µA
750 µA
3
pF
6
Co
Outputs
VO = VCC or GND
3.3 V
7
pF
† _{All typical values are at VCC = 3.3 V, TA = 25°C.}
‡ _{This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.}
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
fclock Clock frequency
tw
Pulse duration, CLK high or low
tsu
Setup time, data before CLK↑
th
Hold time, data after CLK↑
§ _{This information was not available at the time of publication.}
VCC = 1.8 V
± 0.15 V
MIN MAX
§
§
§
§
VCC = 2.5 V
± 0.2 V
MIN MAX
150
3.3
2.1
0.6
VCC = 2.7 V
MIN MAX
150
3.3
2.2
0.5
VCC = 3.3 V
± 0.3 V
MIN MAX
150
3.3
1.9
0.5
UNIT
MHz
ns
ns
ns
4
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