SN65LVEP11_101 Datasheet, PDF (4/13 Pages) Texas Instruments – 2.5 V/3.3 V PECL/ECL 1:2 Fanout Buffer

SN65LVEP11
SLLS930A – NOVEMBER 2008 – REVISED DECEMBER 2008 ........................................................................................................................................ www.ti.com
NECL DC CHARACTERISTICS⁽¹⁾ (V_CC = 0.0 V; V_EE = –3.8V to –2.375 V)⁽²⁾
PARAMETER
–40°C
25°C
MIN
TYP MAX
MIN
TYP MAX
MIN
I_CC Power supply current
V_OH Output HIGH voltage⁽³⁾
V_OL Output LOW voltage⁽³⁾
V_IH
Input high voltage
(Single-Ended) ⁽⁴⁾
–1145
–1945
–1165
28
45
–895
–1600
–880
–1145
–1945
–1165
32
45
–1065 –895
–1777 –1600
–880
–1145
–1945
–1165
V_IL
Input low voltage
(Single-Ended) ⁽⁴⁾
–1945
–1600 –1945
–1600 –1945
V_IHCM
R
I_IH
I_IL
Input HIGH voltage common
mode range (Differential)⁽⁵⁾
Input HIGH current
Input LOW current (D)
nput LOW current (–D)
V_EE+1.2 V_EE+1.2
0.5
–150
0.0 V_EE+1.2 V_EE+1.2
150
0.5
–150
0.0 V_EE+1.2
150
0.5
–150
85°C
TYP
36
V_EE+1.2
UNIT
MAX
45 mA
–895 mV
–1600 mV
–880 mV
–1600 mV
0.0 V
150 µA
µA
(1) The device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board
with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are
applied individually under normal operating conditions and not valid simultaneously
(2) Input and output parameters vary 1:1 with V_CC.
(3) All loading with 50 Ω to V_CC – 2 V.
(4) Single Ended input clock pin operation is limited to VCC ≤ –3 V in NECL mode.
(5) V_{IHCMR min} varies 1:1 with V_EE, V_{IHCMR max} varies 1:1 with V_CC. The V_IHCMR range is referenced to the most positive side of the
differential input signal.
AC CHARACTERISTICS⁽¹⁾
–2.375 V⁽²⁾
(V_CC
=
2.375
V
to
3.8
V;
V_EE
=
0.0
V
or
V_CC
=
0.0
V;
V_EE
=
–3.8
V
to
f_MAX
t_PLH/t_PHL
t_SKEW
t_JITTER
V_PP
t_r/t_f
PARAMETER
Max switching frequency⁽³⁾ (see Figure 6)
Propagation delay to output differential (CLK, Q, –Q)
Device skew ( Q, –Q)
Device to Device Skew (Q, –Q) ⁽⁴⁾
Random clock jitter (RMS) ≤ 1.0 GHz
Random Clock Jitter (RMS) ≤ 1.5 GHz
Random Clock Jitter (RMS) ≤ 2.0 GHz
Random Clock Jitter (RMS) ≤ 2.5 GHz
Random Clock Jitter (RMS) ≤ 3.0 GHz
Input swing Differential Config.
Output rise/fall times Q, –Q (20%–80%)
–40°C
MIN TYP MAX
3.8
200
300
8
25
0.3
0.2
0.2
0.2
0.2
150 800 1200
100
200
25°C
MIN TYP MAX
3.5
200
300
8 15
25
0.3
0.2
0.2
0.2
0.2
150
1200
100
200
85°C
MIN TYP MAX
3.1
200
300
8 15
25
0.3
0.2
0.2
0.2
0.2
150
1200
100
200
UNIT
GHz
ps
ps
ps
mV
ps
(1) The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are
applied individually under normal operating conditions and not valid simultaneously.
(2) Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 Ω to V_CC –2 V.
(3) The maximum switching frequency measured at the output amplitude of 300 mVpp.
(4) Skew is measured between outputs under identical transitions
4
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