DAC5652 Datasheet, PDF (4/22 Pages) Texas Instruments – DUAL, 10-BIT 275 MSPS DIGITAL-TO-ANALOG CONVERTER

DAC5652
SLAS452A – MARCH 2005 – REVISED FEBRUARY 2006
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over T_A (unless otherwise noted)⁽¹⁾
Supply voltage range
Voltage between AGND and DGND
Voltage between AVDD and DVDD
Supply voltage range
Peak input current (any input)
Peak total input current (all inputs)
Operating free-air temperature range
Storage temperature range
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds
AVDD ⁽²⁾
DVDD ⁽³⁾
DA[9:0] and DB[9:0]⁽³⁾
MODE, CLKA, CLKB, WRTA, WRTB⁽³⁾
IOUTA1, IOUTA2, IOUTB1, IOUTB2⁽²⁾
EXTIO, BIASJ_A, BIASJ_B, SLEEP⁽²⁾
UNIT
–0.5 V to 4 V
–0.5 V to 4 V
–0.5 V to 0.5 V
–0.5 V to 0.5 V
–0.5 V to DVDD + 0.5 V
–0.5 V to DVDD + 0.5 V
–1.0 V to AVDD + 0.5 V
–0.5 V to AVDD + 0.5 V
+20 mA
–30 mA
–40°C to 85°C
–65°C to 150°C
260°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Measured with respect to AGND.
(3) Measured with respect to DGND.
ELECTRICAL CHARACTERISTICS
over T_A, AVDD = DVDD = 3.3 V, I_OUTFS = 20 mA, independent gain set mode (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
DC Specifications
Resolution
10
DC Accuracy⁽¹⁾
INL
DNL
Integral nonlinearity
Differential nonlinearity
1 LSB = I_OUTFS/2¹⁰, T_MIN to T_MAX
–1
±0.25
–0.5
±0.16
Analog Output
Offset error
Midscale value (internal reference)
±0.05
Offset mismatch
Midscale value (internal reference)
±0.03
Gain error
With internal reference
±0.75
Minimum full-scale output current⁽²⁾
2
Maximum full-scale output current⁽²⁾
20
Gain mismatch
With internal reference
–2
0.2
Output voltage compliance range⁽³⁾
–1
R_O
Output resistance
300
C_O
Output capacitance
5
Reference Output
Reference voltage
1.14
1.2
Reference output current⁽⁴⁾
100
MAX UNIT
Bits
1 LSB
0.5 LSB
%FSR
%FSR
%FSR
mA
mA
2 %FSR
1.25
V
kΩ
pF
1.26
V
nA
(1) Measured differentially through 50 Ω to AGND.
(2) Nominal full-scale current, I_OUTFS, equals 32x the I_BIAS current.
(3) The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown,
resulting in reduced reliability of the DAC5652 device. The upper limit of the output compliance is determined by the load resistors and
full-scale output current. Exceeding the upper limit adversely affects distortion performance and integral nonlinearity.
(4) Use an external buffer amplifier with high-impedance input to drive any external load.
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