CD74HCT242 Datasheet, PDF (4/7 Pages) Texas Instruments – High Speed CMOS Logic Quad-Bus Transceiver with Three-State Outputs

CD74HCT242, CD74HC243, CD74HCT243
DC Electrical Specifications (Continued)
TEST
CONDITIONS
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
PARAMETER
Input Leakage
Current
SYMBOL V_I (V) I_O (mA) V_CC (V) MIN TYP MAX MIN
MAX
MIN
MAX UNITS
I_I
V_CC or
-
GND
6
-
- ±0.1
-
±1
-
±1
µA
Quiescent Device
Current
I_CC
V_CC or
0
6
-
-
8
-
80
-
160
µA
GND
Three-State Leakage
I_OZ
V_IL or
-
Current
V_IH
HCT TYPES
6
-
- ±0.5
-
±0.5
-
±10
µA
High Level Input
Voltage
V_IH
-
-
4.5 to 2
-
-
2
-
2
-
V
5.5
Low Level Input
Voltage
V_IL
-
-
4.5 to -
- 0.8
-
0.8
-
0.8
V
5.5
High Level Output
Voltage
CMOS Loads
V_OH
V_IH or -0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
V_IL
High Level Output
Voltage
TTL Loads
-6
4.5 3.98 -
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V_OL
V_IH or 0.02
4.5
-
- 0.1
-
0.1
-
0.1
V
V_IL
Low Level Output
Voltage
TTL Loads
6
4.5
-
- 0.26
-
0.33
-
0.4
V
Input Leakage
Current
I_I
V_CC to
0
5.5
-
- ±0.1
-
±1
-
±1
µA
GND
Quiescent Device
Current
I_CC
V_CC or
0
5.5
-
-
8
-
80
-
160
µA
GND
Additional Quiescent
∆I_CC
V_CC
-
4.5 to - 100 360
-
450
-
490
µA
Device Current Per
-2.1
5.5
Input Pin: 1 Unit Load
(Note 4)
Three-State Leakage
I_OZ
V_IL or
-
Current
V_IH
5.5
-
- ±0.5
-
±5.0
-
±10
µA
NOTE:
4. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
An, Bn
1.1
OEA, OEB
0.6
NOTE: Unit Load is ∆I_CC limit specified in DC Electrical
Specifications table, e.g., 360µA max at 25^oC.
4