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| CD74AC86 Datasheet, PDF (4/5 Pages) Texas Instruments – Quad 2-Input Exclusive-OR Gate | |||
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CD74AC86, CD54/74ACT86
Switching Speciï¬cations Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)
-40oC TO 85oC
-55oC TO 125oC
PARAMETER
SYMBOL
VCC (V)
MIN
Input Capacitance
CI
-
-
Power Dissipation Capacitance
CPD
-
-
(Note 11)
TYP
MAX
MIN
TYP
MAX UNITS
-
10
-
-
10
pF
57
-
-
57
-
pF
ACT TYPES
Propagation Delay, Input to
Output
tPHL, tPLH
5
3.8
(Note 10)
-
13.3
3.7
-
14.6
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
57
-
-
57
-
pF
NOTES:
8. Limits tested at 100%.
9. 3.3V Min at 3.6V, Max at 3V.
10. 5V Min at 5.5V, Max at 4.5V.
11.
CACPD: PisDu=seVdCtCo2dfei t(eCrPmDin+e
the
CL)
dynamic
power
consumption
per gate.
ACT: PD = VCC2 fi (CPD + CL) + VCC âICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
tr = 3ns
nA OR nB
tPLH
OUTPUT nY
FIGURE 1.
tf = 3ns
90%
VS
10%
tPHL
VS
OUTPUT
DUT
RL (NOTE)
500â¦
OUTPUT
LOAD
CL
50pF
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kâ¦.
AC
ACT
Input Level
Input Switching Voltage, VS
Output Switching Voltage, VS
VCC
0.5 VCC
0.5 VCC
3V
1.5V
0.5 VCC
FIGURE 2. PROPAGATION DELAY TIMES
4
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