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CD74AC283 Datasheet, PDF (4/10 Pages) Texas Instruments – 4-Bit Binary Fill Adder With Fast Carry
CD54/74AC283, CD54/74ACT283
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case)
-40oC TO 85oC
-55oC TO 125oC
PARAMETER
AC TYPES
SYMBOL
VCC (V)
MIN
TYP
MAX
MIN
TYP
MAX UNITS
Propagation Delay,
An or Bn to COUT
CIN to Sn
CIN to COUT
tPLH, tPHL
1.5
-
3.3
6.3
(Note 9)
5
4.5
(Note 10)
-
199
-
-
22.4
6.2
-
16
4.4
-
219
ns
-
24.6
ns
-
17.6
ns
Propagation Delay,
An or Bn to Sn
tPLH, tPHL
1.5
-
-
207
-
-
228
ns
3.3
6.6
-
23.2
6.4
-
25.5
ns
5
4.7
-
16.5
4.6
-
18.2
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
120
-
-
120
-
pF
ACT TYPES
Propagation Delay,
An or Bn to COUT
CIN to Sn
CIN to COUT
Propagation Delay,
An or Bn to Sn
tPLH, tPHL
5
4.5
(Note 10)
tPLH, tPHL
5
4.7
-
16
2.7
-
17.6
ns
-
16.5
3.3
-
18.2
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
120
-
-
120
-
pF
NOTES:
8. Limits tested 100%.
9. 3.3V Min is at 3.6V, Max is at 3V.
10. 5V Min is at 5.5V, Max is at 4.5V.
11.
CACPD: PisDu=seVdCtCo2dfei t(eCrPmDin+e
the
CL)
dynamic
power
consumption
per function.
ACT: PD = VCC2 fi (CPD + CL) + VCC ∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
tr ≤ 3ns
INPUT
tf ≤ 3ns
INPUT LEVEL
90%
VS
10%
GND
INVERTING
OUTPUT
VS
tPHL
tPLH
FIGURE 1. PROPAGATION DELAY TIMES
OUTPUT
DUT
RL (NOTE)
500Ω
OUTPUT
LOAD
CL
50pF
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.
AC
ACT
Input Level
Input Switching Voltage, VS
Output Switching Voltage, VS
VCC
0.5 VCC
0.5 VCC
3V
1.5V
0.5 VCC
FIGURE 2. PROPAGATION DELAY TIMES
4