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CD74AC04 Datasheet, PDF (4/6 Pages) Texas Instruments – Hex Inverters
CD74AC04, CD74ACT04, CD74AC05, CD74ACT05
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case)
-40oC TO 85oC
-55oC TO 125oC
PARAMETER
AC TYPES
SYMBOL
VCC (V)
MIN
TYP
MAX
MIN
TYP
MAX UNITS
Propagation Delay, Input to
tPLH, tPHL
1.5
-
Output (CD74AC/ACT04)
3.3
2.3
(Note 9)
-
74
-
-
81
ns
-
8.3
2.3
-
9.1
ns
5
1.7
(Note 10)
-
5.9
1.6
-
6.5
ns
Propagation Delay, High Z to
tPZL
Output Low (CD74AC/ACT05)
1.5
-
-
74
-
-
81
ns
3.3
2.3
-
8.3
2.3
-
9.1
ns
5
1.7
-
5.9
1.6
-
6.5
ns
Propagation Delay, Output Low
tPLZ
1.5
-
-
94
-
-
103
ns
to High Z (CD74AC/ACT05)
3.3
3
-
10.4
2.9
-
11.5
ns
5
2.2
-
7.5
2.1
-
8.2
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
105
-
-
105
-
pF
ACT TYPES
Propagation Delay, Input to
Output (CD74AC/ACT04)
tPLH, tPHL
5
2.4
(Note 10)
-
8.5
2.3
-
9.3
ns
Propagation Delay, Output Low
tPLZ
to High Z
5
2.8
-
9.8
2.7
-
10.8
ns
Propagation Delay, High Z to
tPZL
Output Low (CD74AC/ACT05)
5
2.4
-
8.5
2.3
-
9.3
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
105
-
-
105
-
pF
NOTES:
8. Limits tested at 100%.
9. 3.3V Min at 3.6V, Max at 3V.
10. 5V Min at 5.5V, Max at 4.5V.
11. CPD is used to determine the dynamic power consumption per gate.
AACC:TP: PDD==VVCCCC2 2fi
(CPD + CL)
fi (CPD + CL)
+
VCC
∆ICC
where
fi
=
input
frequency,
CL
=
output
load
capacitance,
VCC
=
supply
voltage.
OUTPUT
DUT
RL (NOTE)
500Ω
tr
INPUT
tf
90%
VS
GND
OUTPUT
LOAD
CL
50pF
OUTPUT
VS
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.
Input Level
Input Switching Voltage, VS
Output Switching Voltage, VS
CD74AC
VCC
0.5 VCC
0.5 VCC
CD74ACT
3V
1.5V
0.5 VCC
FIGURE 1. PROPAGATION DELAY TIMES
tPHL
tPLH
FIGURE 2. WAVEFORMS
4