CD74AC00 Datasheet, PDF (4/5 Pages) Texas Instruments – Quad 2-Input NAND Gate

CD74AC00, CD74ACT00
Switching Specifications Input t_r, t_f = 3ns, C_L = 50pF (Worst Case)
-40^oC TO 85^oC
-55^oC TO 125^oC
PARAMETER
AC TYPES
SYMBOL
V_CC (V)
MIN
TYP
MAX
MIN
TYP
MAX UNITS
Propagation Delay, Input to
t_PLH, t_PHL
1.5
-
Output
3.3
2.7
(Note 9)
-
83
-
-
91
ns
-
9.3
2.6
-
10.2
ns
5
1.9
(Note 10)
-
6.6
1.8
-
7.3
ns
Input Capacitance
C_I
-
Power Dissipation Capacitance
C_PD
-
(Note 11)
-
-
10
-
-
10
pF
-
45
-
-
45
-
pF
ACT TYPES
Propagation Delay, Input to
Output
t_PHL
t_PLH
5
2.8
(Note 10)
3.4
Input Capacitance
C_I
-
-
Power Dissipation Capacitance
C_PD
-
-
(Note 11)
-
8
2.7
-
8
ns
-
9.5
3.3
-
9.5
ns
-
10
-
-
10
pF
45
-
-
45
-
pF
NOTES:
8. Limits tested at 100%.
9. 3.3V Min at 3.6V, Max at 3V.
10. 5V Min at 5.5V, Max at 4.5V.
11. CAACC_PD:TP:isPDu_D=s=eVdVCt_CCo_C2d_{2fei ft(i}eC(rC_Pm_DPin_D+e+CthCLe)_Ld) y+nVa_Cm_Cic_∆pIo_Cw_Cewr _hceornesufim=pintiopnutpfererqguaeten.cy, _{CL = output load capacitance, VCC = supply voltage.}
OUTPUT
DUT
R_L (NOTE)
500Ω
OUTPUT
LOAD
C_L
50pF
NOTE: For AC Series Only: When V_CC = 1.5V, R_L = 1kΩ.
CD74AC CD74ACT
Input Level
Input Switching Voltage, V_S
Output Switching Voltage, V_S
V_CC
0.5 V_CC
0.5 V_CC
3V
1.5V
0.5 V_CC
FIGURE 1. PROPAGATION DELAY TIMES
t_r = 3ns
INPUT
LEVEL
V_I
V_O
t_PHL
t_f = 3ns
90%
V_S
10%
GND
V_S
t_PLH
FIGURE 2. WAVEFORMS
4