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CD54HC4017_07 Datasheet, PDF (4/16 Pages) Texas Instruments – High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
◁
CD54HC4017, CD74HC4017
Prerequisite for Switching Specifications
PARAMETER
TEST
VCC
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
Maximum Clock
Frequency
fMAX
-
2
6
-
-
5
-
4
-
MHz
4.5 30
-
-
35
-
20
-
MHz
6
35
-
-
49
-
23
-
MHz
CP Pulse Width
tW
-
2
80
-
-
100
-
120
-
ns
4.5 16
-
-
20
-
24
-
ns
6
14
-
-
17
-
20
-
ns
MR Pulse Width
tW
-
2
80
-
-
100
-
120
-
ns
4.5 16
-
-
20
-
24
-
ns
6
14
-
-
17
-
20
-
ns
Set-up Time,
CE to CP
tSU
-
2
75
-
-
95
-
110
-
ns
4.5 15
-
-
19
-
22
-
ns
6
13
-
-
16
-
19
-
ns
Hold Time,
CE to CP
tH
-
2
0
-
-
0
-
0
-
ns
4.5
0
-
-
0
-
0
-
ns
6
0
-
-
0
-
0
-
ns
MR Removal Time
tREM
-
2
5
-
-
5
-
5
-
ns
4.5
5
-
-
5
-
5
-
ns
6
5
-
-
5
-
5
-
ns
Switching Specifications Input tr, tf = 6ns
PARAMETER
-40oC TO
TEST
VCC
25oC
85oC
-55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
Propagation Delay
CP to any Dec. Out
CP to TC
CE to any Dec. Out
CE to TC
tPLH,
CL = 50pF
2
-
- 230 - 290
-
345
ns
tPHL
CL = 50pF
4.5
-
-
46
-
58
-
69
ns
CL = 15pF
5
-
19
-
-
-
-
-
ns
CL = 50pF
6
-
-
39
-
49
-
59
ns
tPLH,
CL = 50pF
2
-
- 230 - 290
-
345
ns
tPHL
CL = 50pF
4.5
-
-
46
-
58
-
69
ns
CL = 15pF
5
-
19
-
-
-
-
-
ns
CL = 50pF
6
-
-
39
-
49
-
59
ns
tPLH,
CL = 50pF
tPHL
2
-
- 250 - 315
-
375
ns
CL = 50pF
4.5
-
-
50
-
63
-
75
ns
CL = 15pF
5
-
21
-
-
-
-
-
ns
CL = 50pF
6
-
-
43
-
54
-
64
ns
tPLH,
CL = 50pF
2
-
- 250 - 315
-
375
ns
tPHL
CL = 50pF
4.5
-
-
50
-
63
-
75
ns
CL = 15pF
5
-
21
-
-
-
-
-
ns
CL = 50pF
6
-
-
43
-
54
-
64
ns
4
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