CD54HC40103_03 Datasheet, PDF (4/12 Pages) Texas Instruments – High-Speed CMOS Logic 8-Stage Synchronous Down Counters

CD54HC40103, CD74HC40103, CD74HCT40103
DC Electrical Specifications (Continued)
PARAMETER
HCT TYPES
SYMBOL
TEST
CONDITIONS
V_I (V) I_O (mA)
V_CC
(V)
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
MIN TYP MAX MIN MAX MIN MAX UNITS
High Level Input
Voltage
V_IH
-
-
4.5 to
2
-
-
2
-
2
-
V
5.5
Low Level Input
Voltage
V_IL
-
-
4.5 to
-
-
0.8
-
0.8
-
0.8
V
5.5
High Level Output
V_OH V_IH or V_IL -0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V_OL V_IH or V_IL 0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I_I
V_CC and
0
5.5
-
-
±0.1
-
±1
-
±1
µA
GND
Quiescent Device
Current
I_CC
V_CC or
0
GND
5.5
-
-
8
-
80
-
160
µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I_CC
(Note 2)
V_CC
-2.1
-
4.5 to
-
100 360
-
450
-
490
µA
5.5
NOTE:
2. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
P0-P7
UNIT LOADS (NOTE)
0.20
TE, MR
0.40
CP
0.60
PE
0.80
PL
1.35
NOTE: Unit Load is ∆I_CC limit specified in DC Electrical Table, e.g.,
360µA max at 25^oC.
Prerequisite for Switching Specifications
PARAMETER
HC TYPES
CP Pulse Width
PL Pulse Width
SYMBOL V_CC (V) MIN
t_W
2
165
4.5
33
6
28
t_W
2
125
4.5
25
6
21
25^oC
TYP
-
-
-
-
-
-
MAX
-
-
-
-
-
-
-40^oC TO 85^oC
MIN
MAX
-55^oC TO 125^oC
MIN
MAX
UNITS
205
-
250
-
ns
41
-
50
-
ns
35
-
43
-
ns
155
-
190
-
ns
31
-
38
-
ns
26
-
32
-
ns
4