CD54HC4002_07 Datasheet, PDF (4/14 Pages) Texas Instruments – High-Speed CMOS Logic Dual 4-Input NOR Gate

CD54HC4002, CD74HC4002
Switching Specifications Input t_r, t_f = 6ns
PARAMETER
HC TYPES
Propagation Delay,
nA, nB, nC, nD to nY
TEST
SYMBOL CONDITIONS V_CC (V)
t_PLH, t_PHL C_L = 50pF
2
4.5
25^oC
TYP MAX
-40^oC TO 85^oC -55^oC TO 125^oC
MAX
MAX
UNITS
-
100
125
-
20
25
150
ns
30
ns
6
-
17
21
26
ns
C_L = 15pF
5
8
-
-
Output Transition Times
t_TLH, t_THL C_L = 50pF
2
-
75
95
(Figure 1)
4.5
-
15
19
-
ns
110
ns
22
ns
6
-
13
16
19
ns
Input Capacitance
C_IN
-
-
-
10
10
Power Dissipation
C_PD
C_L = 15pF
5
22
-
-
Capacitance (Notes 2, 3)
10
pF
-
pF
NOTES:
2. C_PD is used to determine the dynamic power consumption, per gate.
3. P_D = V_CC2 f_i (C_PD + C_L) where f_i = Input Frequency, C_L = Output Load Capacitance, V_CC = Supply Voltage.
Test Circuit and Waveform
t_r = 6ns
INPUT
90%
50%
10%
t_f = 6ns
V_CC
GND
t_THL
INVERTING
OUTPUT
t_PHL
t_TLH
90%
50%
10%
t_PLH
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC
4