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CD54AC280 Datasheet, PDF (4/10 Pages) Intersil Corporation – 2.4 GHZ WDECT/ISM SINGLE-CHIP TRANSCEIVER
CD54/74AC280, CD54/74ACT280
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case)
-40oC TO 85oC
-55oC TO 125oC
PARAMETER
AC TYPES
SYMBOL
VCC (V)
MIN
TYP
MAX
MIN
TYP
MAX UNITS
Propagation Delay,
Any Input to ∑O
tPLH, tPHL
1.5
-
3.3
7.5
(Note 9)
-
239
-
-
263
ns
-
26
7.3
-
29
ns
5
5.4
(Note 10)
-
19.1
5.3
-
21
ns
Propagation Delay,
Any Input to ∑E
tPLH, tPHL
1.5
-
-
227
-
-
250
ns
3.3
7.2
-
25
7
-
28
ns
5
5.2
-
18.2
5
-
20
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
115
-
-
115
-
pF
ACT TYPES
Propagation Delay,
Any Input to ∑O
tPLH, tPHL
5
5.6
(Note 10)
-
19.6
5.4
-
21.6
ns
Propagation Delay,
Any Input to ∑E
tPLH, tPHL
5
5.6
-
19.6
5.4
-
21.6
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 11)
-
-
10
-
-
10
pF
-
115
-
-
115
-
pF
NOTES:
8. Limits tested 100%
9. 3.3V Min is at 3.6V, Max is at 3V.
10. 5V Min is at 5.5V, Max is at 4.5V.
11. CAACCPD:TP:isPDuD=s=eVdVCtCCoC2d2fei ft(ieC(rCPmDPinD+e+CthCLe)Ld) y+nVaCmCic∆pIoCwCewr hceornesufim=pintiopnutpfererqpuaecnkcayg,eC. L = output load capacitance, VCC = supply voltage.
INPUT
LEVEL
In
0V
10%
tr = 3ns
VS
tPHL
ΣO
0V
ΣE
0V
VS
tPLH
VS
FIGURE 1.
tf = 3ns
VS
10%
tPLH
OUTPUT
DUT
RL (NOTE)
500Ω
OUTPUT
LOAD
CL
50pF
VS
tPHL
VS
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.
AC
ACT
Input Level
Input Switching Voltage, VS
Output Switching Voltage, VS
VCC
0.5 VCC
0.5 VCC
3V
1.5V
0.5 VCC
FIGURE 2. PROPAGATION DELAY TIMES
4