CD4066B_15 Datasheet, PDF (4/25 Pages) Texas Instruments – CMOS QUAD BILATERAL SWITCH

CD4066B
CMOS QUAD BILATERAL SWITCH
SCHS051D − NOVEMBER 1998 − REVISED SEPTEMBER 2003
electrical characteristics
LIMITS AT INDICATED TEMPERATURES
PARAMETER
TEST CONDITIONS
Quiescent device
IDD _current
Signal Inputs (Vis) and Outputs (Vos)
VC = VDD,
RL = 10 kΩ returned
ron
On-state resistance
(max)
ǒ_{VDD * VSS}Ǔ
to
2
,
Vis = VSS to VDD
VIN
(V)
0, 5
0, 10
0, 15
0, 20
VDD
(V)
5
10
15
20
−55°C
0.25
0.5
1
5
−40°C
0.25
0.5
1
5
85°C
7.5
15
30
150
125°C
7.5
15
30
150
25°C
TYP MAX
0.01 0.25
0.01 0.5
0.01
1
0.02
5
5
800 850 1200 1300 470 1050
10
310 330 500
550 180 400
15
200 210 300
320 125 240
On-state resistance
5
15
∆ron difference between RL = 10 kΩ, VC = VDD
10
10
any two switches
15
5
Total harmonic
THD _distortion
VC = VDD = 5 V, VSS = −5 V,
Vis(p-p) = 5 V (sine wave centered on 0 V),
RL = 10 kΩ, fis = 1-kHz sine wave
0.4
−3-dB cutoff
frequency
(switch on)
VC = VDD = 5 V, VSS = −5 V, Vis(p-p) = 5 V
(sine wave centered on 0 V), RL = 1 kΩ
40
−50-dB feedthrough VC = VSS = −5 V, Vis(p-p) = 5 V
frequency (switch off) (sine wave centered on 0 V), RL = 1 kΩ
Input/output leakage VC = 0 V, Vis = 18 V, Vos = 0 V;
Iis current (switch off) and
18
±0.1 ±0.1
±1
(max)
VC = 0 V, Vis = 0 V, Vos = 18 V
−50-dB crosstalk
frequency
VC(A) = VDD = 5 V,
VC(B) = VSS = −5 V,
Vis(A) = 5 Vp-p, 50-Ω source,
RL = 1 kΩ
RL = 200 kΩ, VC = VDD,
5
Propagation delay VSS = GND, CL = 50 pF,
tpd (signal input to
Vis = 10 V
10
signal output)
(square wave centered on 5 V),
tr, tf = 20 ns
15
Cis Input capacitance
VDD = 5 V, VC = VSS = −5 V
Cos Output capacitance VDD = 5 V, VC = VSS = −5 V
Cios Feedthrough
VDD = 5 V, VC = VSS = −5 V
1
±1 ±10−5 ±0.1
8
20 40
10 20
7 15
8
8
0.5
UNIT
µA
Ω
Ω
%
MHz
MHz
µA
MHz
ns
pF
pF
pF
4
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