AM3517_1005 Datasheet, PDF (4/218 Pages) Texas Instruments – AM3517/05 ARM Microprocessor

AM3517, AM3505
SPRS550A – OCTOBER 2009 – REVISED MAY 2010
www.ti.com
1.3 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the AM3517/05 ARM Microprocessor.
MPU
Subsystem
ARM Cortex-
A8^TM Core
16K/16K L1$
L2$
256K
LCD Panel
CVBS
or
S-Video
Parallel
Analog
DAC
POWERVR
SGX^TM
Graphics
Accelerator
(AM3517 only)
32
Channel
System
DMA
Dual Output 3-Layer
Display Processor
(1xGraphics, 2xVideo)
Temporal Dithering
SDTV → QCIF Support
USB transceivers /
device ports [3]
HS/FS/
LS
USB
Host
USB PHY
USB OTG
Controller
HECC
64
64 32
32 32 32
32
EMAC
Async
32
VPFE
64
64
L3 Interconnect Network-Hierarchial, Performance, and Power Driven
32
64K
On-Chip
RAM
132K
On-Chip
BOOT
ROM
64
SMS:
SDRAM
Memory
Scheduler/
Rotation
EMIF
Controller
DDR PHY
32
GPMC:
General
Purpose
Memory
Controller
32
32
L4 Interconnect
Peripherals:
4xUART, 3xHigh-Speed I2C,
5xMcBSP
(2x with Sidetone/Audio Buffer)
4xMcSPI, 186xGPIO,
3xHigh-Speed MMC/SDIO,
HDQ/1 Wire,
12xGPTimers, 1xWDT,
32K Sync Timer
System
Controls
PRCM
External
Peripherals
Interfaces
External
DDR2/
mDDR
NAND/NOR/
FLASH,
SRAM
Emulation
Debug: ETM, JTAG
Figure 1-1. AM3517/05 Functional Block Diagram
SPRS550-006
4
AM3517/05 ARM Microprocessor
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