TMS320VC549 Datasheet, PDF (39/60 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

TMS320VC549
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS078F – SEPTEMBER 1998 – REVISED MAY 2000
instruction acquisition (IAQ), interrupt acknowledge (IACK), external flag (XF), and TOUT timing
switching characteristics over recommended
[H = 0.5 t_c(CO)] (see Figure 18)
PARAMETER
td(CLKL-IAQL)
td(CLKL-IAQH)
td(A)IAQ
td(CLKL-IACKL)
td(CLKL-IACKH)
td(A)IACK
th(A)IAQ
th(A)IACK
tw(IAQL)
tw(IACKL)
Delay time, IAQ low from CLKOUT low
Delay time, IAQ high from CLKOUT low
Delay time, address valid before IAQ low
Delay time, IACK low from CLKOUT low
Delay time , IACK high from CLKOUT low
Delay time, address valid before IACK low
Hold time, address valid after IAQ high
Hold time, address valid after IACK high
Pulse duration, IAQ low
Pulse duration, IACK low
operating
conditions for IAQ and
’549-80
’549-100
MIN MAX
–1
5
–1
5
4
0
5
0
5
3
–3
–3
2H–3
2H–3
’549-120
MIN
–1
–1
0
0
–3
–3
2H–3
2H–3
MAX
4
4
4
4
4
3
IACK
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLKOUT
A[15:0]
td(CLKL-IAQL)
IAQ
IACK
td(A)IAQ
tw(IAQL)
td(CLKL-IACKL)
td(A)IACK
tw(IACKL)
td(CLKL-IAQH)
th(A)IAQ
td(CLKL-IACKH)
th(A)IACK
MSTRB
Figure 18. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timing
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