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BQ24721 Datasheet, PDF (37/48 Pages) Texas Instruments – ADVANCED MULTI-CHEMISTRY AND MULTI-CELL SYNCHRONOUS SWITCH-MODE CHARGER AND SYSTEM POWER SELECTOR
bq24721
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SBS-Like SMBus: Commands Implemented: Status Register
SLUS683 – NOVEMBER 2005
Charger Status, (0x13), Read-Only
All Status register bits are automatically updated by the IC whenever the system state changes, some bits have
an 8 ms deglitch to prevent false alerts. Whenever a status bit changes, the ALARM open drain output pulls
down to alert the host of a change in the status register. The ALARM stays low until the host performs a
STATUS register (0×13) read, afterward, the ALARM clears and goes high impedance. An external pull-up
resistor is needed at the ALARM pin.
BIT
SBS SPEC
0 (LSB) CHARGE_INHIBITED
1
MASTER MODE
2
VOLTAGE_NOTREG
3
CURRENT_NOTREG
4
LEVEL2
5
LEVEL3
bq24721 SBS-Like
NOT READY TO CHARGE
1 = Charger is not ready to charge (IC comes up in this state)
0 = Charger is ready to charge
(Note: Same logic polarity as SBS spec, but added Feature, Not part of SBS spec.) This bit indicates
all the conditions are met to allow the charger to start charging. Precursers are Power-on-Reset is
completed; adapter is detected, and REGN driver rail is ready.
CHARGER NOT ON
1 = Charger is Not On (IC comes up in this state)
0 = Charger is On
(Note: same logic polarity and different bit, from SBS spec bit 0) Hi on this bit indicates that the charger
is on . If Low, the charger is off. This bit allows the user to determine if there is a fault that disable the
charger. Bits in this STATUS register 0x13 can be used in conjunction with this bit to determine the
source of charger turning off.
CHARGE VOLTAGE LOOP NOT ACTIVE
1 = Charge Voltage Loop Not Active (IC comes up in this state, and in this state when charger is not
enabled)
0 = Charge Voltage Loop Active
(Note: same logic polarity as SBS spec bit 2). A Lo on this bit indicates the battery voltage regulation
loop is active and is influencing the charger regulation. There is an overlap as one loop transitions to
another loop to allow for a soft transition knee. This overlap can alert that another loop is getting close
to its limit and is influencing the output.
CHARGE CURRENT LOOP NOT ACTIVE
1 = Charge Current Loop Not Active (IC comes up in this state, and in this state when charger is not
enabled)
0 = Charge Current Loop Active
(Note: same logic polarity from SBS spec bit 3) A LO on this bit indicates the charge current regulation
loop is active and is influencing the charger regulation. There is an overlap as one loop transitions to
another loop to allow for a soft transition knee. This overlap can alert that another loop is getting close
to its limit and is influencing the output.
DPM INPUT CURRENT LOOP NOT ACTIVE
1 = DPM Input Current Loop Not Active (IC comes up in this state, and in this state when charger is
not enabled)
0 = DPM Input Current Loop Active
(Note: Added Feature, Not part of SBS spec. Same logic polarity from bits 2&3 of SBS spec) Dynamic
Power Management (DPM) dynamically reduces the charge current when the system current increases
enough to cause the total input current to reach the input power limit. This gives power delivery
precedence to the system current over the charge current. A Lo on this bit indicates the input current
regulation loop is active and is influencing the charger regulation. There is an overlap as one loop
transitions to another loop to allow for a soft transition knee. This overlap can alert that another loop is
getting close to its limit and is influencing the output.
CHARGE OVERCURRENT FAULT
(Note: Added Feature, Not part of SBS spec.)
HI indicates the charge current was higher than the charge overcurrent limit (SROC) which is 1.7 times
the charge regulation setting. This is to protect from shorts or large load transients at the output. If
SROC is detected, the high-side FET is immediately turned-off, and an alarm is sent out. The charger
retres again, allowing the high-side FET to turn-on the next cycle. This fault current limit continues until
the fault is removed.
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