TMS470R1VF338 Datasheet, PDF (36/56 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLERS

TMS470R1VF338, TMS470R1VF348, TMS470R1VF3382, TMS470R1VF3482
16/32-BIT RISC FLASH MICROCONTROLLERS
SPNS077J – NOVEMBER 2001 – REVISED AUGUST 2006
SPIn master mode timing parameters
SPIn master mode external timing parameters (CLOCK PHASE = 0, SPInCLK = output, SPInSIMO =
output, and SPInSOMI = input)^{†‡§} (see Figure 11)
NO.
1 t_c(SPC)M
Cycle time, SPInCLK ^¶
2^#
t_w(SPCH)M
t_w(SPCL)M
Pulse duration, SPInCLK high (clock polarity = 0)
Pulse duration, SPInCLK low (clock polarity = 1)
3^#
t_w(SPCL)M
t_w(SPCH)M
Pulse duration, SPInCLK low (clock polarity = 0)
Pulse duration, SPInCLK high (clock polarity = 1)
t_{d(SPCH-SIMO)M}
Delay time, SPInCLK high to SPInSIMO valid
(clock polarity = 0)
4^#
t_{d(SPCL-SIMO)M}
Delay time, SPInCLK low to SPInSIMO valid
(clock polarity = 1)
5^{# t}v(SPCL-SIMO)M ^{Valid time, SPInSIMO data valid}
6^#
t_{su(SOMI-SPCL)M}
Setup time, SPInSOMI before SPInCLK low
(clock polarity = 0)
t_{su(SOMI-SPCH)M}
Setup time, SPInSOMI before SPInCLK high
(clock polarity = 1)
t_{v(SPCL-SOMI)M}
Valid time, SPInSOMI data valid after SPInCLK low
(clock polarity = 0)
7^#
t_{v(SPCH-SOMI)M}
Valid time, SPInSOMI data valid after SPInCLK high
(clock polarity = 1)
MIN
100
0.5t_c(SPC)M – t_r
0.5t_c(SPC)M – t_f
0.5t_c(SPC)M – t_f
0.5t_c(SPC)M – t_r
t_c(SPC)M – 5 – t_r/f
6
6
4
4
MAX
256t_c(ICLK)
0.5t_c(SPC)M + 5
0.5t_c(SPC)M + 5
0.5t_c(SPC)M + 5
0.5t_c(SPC)M + 5
10
10
UNIT
ns
ns
ns
ns
ns
ns
ns
† The MASTER bit (SPInCTRL2.3) is set and the CLOCK PHASE bit (SPInCTRL2.0) is cleared.
‡ t_c(ICLK) = interface clock cycle time = 1/f_(ICLK)
§ For rise and fall timings, see the “switching characteristics for output timings versus load capacitance” table.
¶ When the SPI is in Master mode, the following must be true:
For PS values from 1 to 255: t_c(SPC)M ≥ (PS +1)t_c(ICLK) ≥ 100 ns, where PS is the prescale value set in the SPInCTL1.[12:5] register bits.
For PS values of 0:
t_c(SPC)M = 2t_c(ICLK) ≥ 100 ns.
# The active edge of the SPInCLK signal referenced is controlled by the CLOCK POLARITY bit (SPInCTRL2.1).
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