ISO5500_15 Datasheet, PDF (35/43 Pages) Texas Instruments – ISO5500 2.5-A Isolated IGBT, MOSFET Gate Driver

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ISO5500
SLLSE64D – SEPTEMBER 2011 – REVISED JANUARY 2015
10 Power Supply Recommendations
To provide the large transient currents necessary during a switching transition on the gate driver output, 0.1-μF
bypass capacitors are recommended between input supply and ground (V_CC1 and GND1), and between output
supplies and ground (V_CC2 and V_E, V_CC2 and V_EE-P and V_EE-P and V_E). These capacitors are shown in Figure 62.
These capacitors should be placed as close to the supply and ground pins as possible.
11 Layout
11.1 Layout Guidelines
A minimum of four layers is required to accomplish a low EMI PCB design (see Figure 74). Layer stacking should
be in the following order (top-to-bottom): high-current or sensitive signal layer, ground plane, power plane and
low-frequency signal layer.
• Routing the high-current or sensitive traces on the top layer avoids the use of vias (and the introduction of
their inductances) and allows for clean interconnects between the gate driver and the microcontroller and
power transistors. Gate driver control input, Gate driver output V_OUT and DESAT should be routed in the top
layer.
• Placing a solid ground plane next to the sensitive signal layer provides an excellent low-inductance path for
the return current flow. On the driver side, use VE as the ground plane.
• Placing the power plane next to the ground plane creates additional high-frequency bypass capacitance of
approximately 100 pF/in2. On the gate-driver V_EE-P and V_CC2 can be used as power planes. They can share
the same layer on the PCB as long as they are not connected together.
• Routing the slower speed control signals on the bottom layer allows for greater flexibility as these signal links
usually have margin to tolerate discontinuities such as vias.
For more detailed layout recommendations, including placement of capacitors, impact of vias, reference planes,
routing etc. see Application Note SLLA284, Digital Isolator Design Guide.
11.2 PCB Material
Standard FR-4 epoxy-glass is recommended as PCB material. FR-4 (Flame Retardant 4) meets the
requirements of Underwriters Laboratories UL94-V0, and is preferred over cheaper alternatives due to its lower
dielectric losses at high frequencies, less moisture absorption, greater strength and stiffness, and its self-
extinguishing flammability-characteristics.
11.3 Layout Example
High-speed traces
Ground plane
Power plane
Low-speed traces
10 mils
40 mils
10 mils
Keep this
space free
from planes,
traces , pads,
and vias
FR-4
0_r ~ 4.5
Figure 74. Recommended Layer Stack
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