DRV421_15 Datasheet, PDF (34/44 Pages) Texas Instruments – DRV421 Integrated Magnetic Fluxgate Sensor for Closed-Loop Current Sensing

DRV421
SBOS704A – MAY 2015 – REVISED JULY 2015
9 Power-Supply Recommendations
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9.1 Power-Supply Decoupling
Decouple both VDD pins of the DRV421 with 1-uF X7R-type ceramic capacitors to the adjacent GND pin as
shown in Figure 71. For best performance, place both decoupling capacitors as close to the related power-supply
pins as possible. Connect these capacitors to the power-supply source in a way that allows the current to flow
through the pads of the decoupling capacitors.
9.2 Power-On Start Up and Brownout
Power-on is detected when the supply voltage exceeds 2.4 V at VDD pin. At this point, DRV421 initiates
following start-up sequence:
1. Digital logic starts up and waits for 26 μs for the supply to settle.
2. Fluxgate sensor powers up.
3. If fluxgate sensor saturation is detected, search function starts as described in the Search Function section.
4. If DEMAG pin is set high, demagnetization cycle starts as described in the Magnetic Core Demagnetization
section.
5. The compensation loop is active after the demagnetization cycle, or 80 μs after the supply voltage exceeds
2.4 V.
During this startup sequence, the ICOMP1 and ICOMP2 outputs are pulled low to prevent undesired signals on
the compensation coil, and the ER pin is asserted low.
The DRV421 tests for low supply voltages with a brownout voltage level of 2.4 V. Use a power-supply source
capable of supporting large current pulses driven by the DRV421, and low ESR bypass capacitors for stable
supply voltage in the system. A supply drop below 2.4-V that lasts longer than 20 μs generates a power-on reset;
the device ignores shorter voltage drops. A voltage drop on the VDD pin to below 1.8 V immediately initiates a
power-on reset. After the power supply returns to 2.4 V, the device initiates a start-up cycle, as described at the
beginning of this section.
9.3 Power Dissipation
The thermally-enhanced, PowerPAD, QFN package reduces the thermal impedance from junction to case. This
package has a downset lead frame on which the die is mounted. The lead frame has an exposed thermal pad
(PowerPAD) on the underside of the package, and provides a good thermal path for the heat dissipation.
The power dissipation on both linear outputs ICOMP1 and ICOMP2 is calculated with Equation 8:
P_D(ICOMP) = I_ICOMP × (V_ICOMP – V_SUPPLY)
where
• V_SUPPLY = voltage potential closer to V_ICOMP, V_DD, or GND
(8)
CAUTION
Output short-circuit conditions are particularly critical for the H-bridge driver output pins
ICOMP1 and ICOMP2. The full supply voltage occurs across the conducting transistor
and the current is only limited by the current density limitation of the FET; permanent
damage can occur. The DRV421 does not feature temperature protection or thermal
shut-down.
9.3.1 Thermal Pad
Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but
board layout greatly influences the overall heat dissipation. Technical details are described in application report
SLMA002, PowerPad Thermally Enhanced Package, available for download at www.ti.com.
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