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THS7360 Datasheet, PDF (33/41 Pages) Texas Instruments – 6-Channel Video Amplifier with 3-SD and 3-SD/ED/HD/Full-HD Filters and High Gain
THS7360
www.ti.com
SLOS674 – JUNE 2010
EVALUATION MODULE
To evaluate the THS7360, an evaluation module
(EVM) is available. The THS7360EVM allows for
testing the THS7360 in many different configurations.
Inputs and outputs include BNC connectors and RCA
connectors commonly found in video systems, along
with 75-Ω input termination resistors, 75-Ω series
source termination resistors, and 75-Ω characteristic
impedance traces. Several unpopulated component
pads are found on the EVM to allow for different input
and output configurations as dictated by the user.
This EVM is designed to be used with a single supply
from 2.6 V up to 5 V.
The EVM default input configuration sets all channels
for dc input coupling. The input signal must be within
0 V to approximately 0.65 V for proper operation.
Failure to be within this range saturates and/or clips
the output signal. If the input range is beyond this, if
the signal voltage is unknown, or if coming from a
current sink DAC, then ac input configuration is
desired. This option is easily accomplished with the
EVM by simply replacing the Z1 through Z6 0-Ω
resistors with 0.1-mF capacitors.
For an ac-coupled input and sync-tip clamp (STC)
functionality commonly used for CVBS, s-video Y',
component Y' signals, and R'G'B' signals, no other
changes are needed. However, if a bias voltage is
needed after the input capacitor which is commonly
needed for s-video C', component P'B, and P'R, then a
pull-up resistor should be added to the signal on the
EVM. This configuration is easily achieved by simply
adding a resistor to any of the following resistor pads;
RX7 to RX12. A common value to use is 10 MΩ.
Note that even signals with embedded sync can also
use bias mode if desired.
The EVM default output configuration sets all
channels for ac output coupling. The 470-mF and
0.1-mF capacitors work well for most ac-coupled
systems. However, if dc-coupled output is desired,
then replacing the 0.1-mF capacitors (C20, C22, C24,
C26, C28, and/or C30) with 0-Ω resistors works well.
Removing the 470-mF capacitors is optional, but
removing them from the EVM eliminates a few
picofarads of stray capacitance on each signal path
which may be desirable.
The THS7360 incorporates an easy method to
configure the bypass modes and the disable modes.
The use of JP4 controls the SD channels disable
feature; JP6 controls the SF channels disable feature;
JP3 controls the SD channels filter/bypass mode; and
JP5 controls the SF channels filter/bypass mode.
Connection of JP4 and JP6 to GND applies 0 V to the
disable pins and the THS7360 operates normally.
Moving JP4 to +VS causes the THS7360 SD
channels to be in disable mode, while moving JP6 to
+VS causes the THS7360 SF channels to be in
disable mode.
Connection of JP3 to GND places the THS7360 SD
channels in filter mode while moving JP3 to +VS
places the THS7360 SD channels in bypass mode.
Connection of JP5 to GND places the THS7360 SF
channels in filter mode while moving JP5 to +VS
places the THS7360 SF channels in bypass mode.
The filter selection is also easily accomplished by
using jumpers JP1 and JP2. JP1 controls the logic
voltage for the filter 1 pin while JP2 controls the logic
voltage for the filter 2 pin. Table 1 and Table 2 show
the truth table for the filter selection and the
appropriate logic for 3.3-V and 5-V operation,
respectively. The EVM also has a truth table printed
on it for easy reference.
Figure 49 shows the THS7360EVM schematic.
Figure 51 and Figure 52 illustrate the two layers of
the EVM PCB, incorporating standard high-speed
layout practices. Table 7 lists the bill of materials as
the board comes supplied from Texas Instruments.
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): THS7360
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