THS7364_10 Datasheet, PDF (32/47 Pages) Texas Instruments – 6-Channel Video Amplifier with 3 SD and 3 Full-HD Filters with 6-dB Gain

THS7364
SBOS530 – AUGUST 2010
One other issue that must be taken into account is
the dc-bias point is a function of the power supply. As
such, there is an impact on system PSRR. To help
reduce this impact, the input capacitor combines with
the pull-up resistance to function as a low-pass filter.
Additionally, the time to charge the capacitor to the
final dc bias point is a function of the pull-up resistor
and the input capacitor size. Lastly, the input
capacitor forms a high-pass filter with the parallel
impedance of the pull-up resistor and the 800-kΩ
resistor. In general, it is good to have this high-pass
filter at approximately 3 Hz to minimize any potential
droop on a P’_B or P’_R signal. A 0.1-mF input capacitor
with a 3.3-MΩ pull-up resistor equates to
approximately a 2.5-Hz high-pass corner frequency.
This mode of operation is recommended for use with
chroma (C’), P’_B, P’_R, U’, and V’ signals. This method
can also be used with sync signals if desired. The
benefit of using the STC function over the ac-bias
configuration on embedded sync signals is that the
STC maintains a constant back-porch voltage as
opposed to a back-porch voltage that fluctuates
depending on the video content. Because the
high-pass corner frequency is a very low 2.5 Hz, the
impact on the video signal is negligible relative to the
STC configuration.
One question may arise over the P’_B and P’_R
channels. For 480i, 576i, 480p, and 576p signals, a
sync may or may not be present. If no sync exists
within the signal, then it is obvious that ac-bias is the
preferred method of ac-coupling the signal.
For 720p, 1080i, and 1080p signals, or for the the
480i, 576i, 480p, and 576p signals with sync present
on the P’_B and P’_R channels, the lowest voltage of the
sync is –300 mV below the midpoint reference
voltage of 0 V. The P’_B and P’_R signals allow a signal
to be as low as –350 mV below the midpoint
reference voltage of 0 V. This allowance corresponds
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to 100% yellow for P’_B signal or 100% cyan for P’_R
signal . Because the P’_B and P’_R signal voltage can
be lower than the sync voltage, there exists a
potential for clipping of the signal for a short period of
time if the signals drop below the sync voltage.
The THS7364 does include a 150-mV input level
shift, or 300 mV at the output, that should mitigate
any clipping issues. For example, if a STC is used,
then the bottom of the sync is 300 mV at the output.
If the signal does go the lowest level, or 50 mV lower
than the sync at the input, then the instantaneous
output is (–50 mV + 150 mV) × 2 = 200 mV at the
output.
Another potential risk is that if this signal (100%
yellow for P’_B or 100% cyan for P’_R) exists for several
pixels, then the STC circuit engages to raise the
voltage back to 0 V at the input. This function can
cause a 50-mV level shift at the input midway through
the active video signal. This effect is undesirable and
can cause errors in the decoding of the signal.
It is therefore recommended to use ac bias mode for
component P’_B and P’_R signals when ac-coupling is
desired.
OUTPUT MODE OF OPERATION:
DC-COUPLED
The THS7364 incorporates a rail-to-rail output stage
that can be used to drive the line directly without the
need for large ac-coupling capacitors. This design
offers the best line tilt and field tilt (droop)
performance because no ac-coupling occurs. Keep in
mind that if the input is ac-coupled, then the resulting
tilt as a result of the input ac-coupling continues to be
seen on the output, regardless of the output coupling.
The 80-mA output current drive capability of the
THS7364 is designed to drive two video lines
simultaneously—essentially, a 75-Ω load—while
keeping the output dynamic range as wide as
possible. Figure 81 shows the THS7364 driving two
video lines while keeping the output dc-coupled.
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