TAS5036A Datasheet, PDF (32/62 Pages) Texas Instruments – SIX CHANNEL DIGITAL AUDIO PWM PROCESSOR

Serial Control Interface Register Definitions
3.2 Error Status Register (0x01)
Table 3−3. Error Status Register
D7 D6 D5 D4 D3 D2 D1 D0
FUNCTION
1
-
-
-
-
-
-
- FS error has occurred
-
1
-
-
-
-
-
- Control pin change has occurred
-
-
-
1
-
-
-
- LRCLK error
-
-
-
-
1
-
-
- MCLK_IN count error
-
-
-
-
-
1
-
- DCLK phase error with respect to MCLK_IN
-
-
-
-
-
-
1
- MCLK_IN phase error with respect to DCLK
-
-
-
-
-
-
-
1 PWM timing error
0
0
0
0
0
0
0
0 No errors—no control pins changed (see Note 1)
NOTE 1: Write 00h to clear error indications in error status register.
3.3
D7
0
0
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
System Control Register 0 (0x02)
Table 3−4. System Control Register 0
D6 D5 D4 D3 D2 D1 D0
FUNCTION
0
-
-
-
-
-
- Normal mode (in slave mode—quad speed detected if MCLK_IN = 128 Fs)
1
-
-
-
-
-
- Double speed
0
-
-
-
-
-
- Quad speed
1
-
-
-
-
-
- Illegal
-
0
-
-
-
-
- Use de-emphasis pin controls
-
1
-
-
-
-
- Use de-emphasis I2C controls
-
-
0
0
-
-
- No de-emphasis
-
-
0
1
-
-
- De-emphasis for Fs = 32 kHz
-
-
1
0
-
-
- De-emphasis for Fs = 44.1 kHz
-
-
1
1
-
-
- De-emphasis for Fs = 48 kHz
-
-
-
-
0
0
0 16 bit, MSB first; right justified
-
-
-
-
0
0
1 20 bit, MSB first; right justified
-
-
-
-
0
1
0 24 bit, MSB first; right justified
-
-
-
-
0
1
1 16-bit I2S
-
-
-
-
1
0
0 20-bit I2S
-
-
-
-
1
0
1 24-bit I2S
-
-
-
-
1
1
0 16-bit MSB first
-
-
-
-
1
1
1 16-bit DSP frame
26 TAS5036A
SLES061B—November 2002—Revised January 2004