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DAC7568_10 Datasheet, PDF (32/58 Pages) Texas Instruments – 12-/14-/16-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTERS with 2.5V, 2ppm/°C Internal Reference
DAC7568
DAC8168
DAC8568
SBAS430A – JANUARY 2009 – REVISED APRIL 2009 ..................................................................................................................................................... www.ti.com
Flexible Mode (see Table 3, Table 4, and Table 5)
Enabling Internal Reference:
Method 1) To enable the internal reference, write the
32-bit serial command shown in Table 3. When
performing a power cycle to reset the device, the
internal reference is switched off (default mode). In
the default mode, the internal reference is powered
down until a valid write sequence is applied to power
up the internal reference. If the internal reference is
powered up, it automatically powers down when all
DACs power down in any of the power-down modes
(see the Power Down Modes section). The internal
reference powers up automatically when any DAC is
powered up.
Method 2) To always enable the internal reference,
write the 32-bit serial command shown in Table 4.
When the internal reference is always enabled, any
power-down command to the DAC channels does not
change the internal reference operating mode. When
performing a power cycle to reset the device, the
internal reference is switched off (default mode). In
the default mode, the internal reference is powered
down until a valid write sequence is applied to power
up the internal reference. When the internal reference
is powered up, it remains powered up, regardless of
the state of the DACs.
Disabling Internal Reference:
To disable the internal reference, write the 32-bit
serial command shown in Table 5. When performing
a power cycle to reset the device, the internal
reference is switched off (default mode).
When the internal reference is operated in Flexible
mode, Static mode is disabled and does not work. To
switch from Flexible mode to Static mode, use the
command shown in Table 6.
Table 3. Write Sequence for Enabling Internal Reference (Flexible Mode)
(Internal Reference Powered On—09080000h)
DB31
DB27
DB23
DB19
DB4
DB0
0XXX
0XXX1 0 0 1
|-- Prefix Bits --| |- Control Bits -|
XXXX
| Address Bits |
1 0 0XXXXXXXXXXXXX
|-------------------------------------- Data Bits --------------------------------------|
XXXX
| Feature Bits |
Table 4. Write Sequence for Enabling Internal Reference (Flexible Mode)
(Internal Reference Always Powered On—090A0000h)
DB31
DB27
DB23
DB19
DB4
DB0
0XXX
0XXX1 0 0 1
|-- Prefix Bits --| |- Control Bits -|
XXXX
| Address Bits |
1 0 1XXXXXXXXXXXXX
|-------------------------------------- Data Bits --------------------------------------|
XXXX
| Feature Bits |
Table 5. Write Sequence for Disabling Internal Reference (Flexible Mode)
(Internal Reference Always Powered Down—090C0000h)
DB31
DB27
DB23
DB19
DB4
DB0
0XXX
0XXX1 0 0 1
|-- Prefix Bits --| |- Control Bits -|
XXXX
| Address Bits |
1 1 0XXXXXXXXXXXXX
|-------------------------------------- Data Bits --------------------------------------|
XXXX
| Feature Bits |
Table 6. Write Sequence for Switching from Flexible Mode to Static Mode for Internal Reference
(Internal Reference Always Powered Down—09000000h)
DB31
DB27
DB23
DB19
DB4
DB0
0XXX
0XXX1 0 0 1
|-- Prefix Bits --| |- Control Bits -|
XXXX
| Address Bits |
0 0 0XXXXXXXXXXXXX
|-------------------------------------- Data Bits --------------------------------------|
XXXX
| Feature Bits |
32
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