MSP430X11X1 Datasheet, PDF (31/45 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x11x1
MIXED SIGNAL MICROCONTROLLER
SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
outputs P1.x, P2.x, TAx
PARAMETER
TEST CONDITIONS
VCC
MIN TYP MAX
f(P20)
P2.0/ACLK,
CL = 20 pF
2.2 V/3 V
f(TAx)
Output frequency
TA0, TA1, TA2,
CL = 20 pF
Internal clock source, SMCLK signal applied (see Note 16)
2.2 V/3 V
dc
fSystem
fSystem
P1.4/SMCLK,
CL = 20 pF
fSMCLK = fLFXT1 = fXT1
fSMCLK = fLFXT1 = fLF
fSMCLK = fLFXT1/n
2.2 V/3 V
40%
35%
50%–
15 ns
50%
60%
65%
50%+
15 ns
t(Xdc) Duty cycle of O/P
frequency
fSMCLK = fDCOCLK
2.2 V/3 V
50%–
15 ns
50%
50%+
15 ns
P2.0/ACLK,
CL = 20 pF
fP20 = fLFXT1 = fXT1
fP20 = fLFXT1 = fLF
fP20 = fLFXT1/n
2.2 V/3 V
40%
30%
t(TAdc)
TA0, TA1, TA2,
CL = 20 pF, Duty cycle = 50% 2.2 V/3 V
NOTE 16: The limits of the system clock MCLK has to be met. MCLK and SMCLK can have different frequencies.
50%
0
60%
70%
±50
UNIT
MHz
ns
Comparator_A (see Note 17)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
I(DD)
I(Refladder/
RefDiode)
CAON=1, CARSEL=0, CAREF=0
CAON=1, CARSEL=0,
CAREF=1/2/3, No load at
P2.3/CA0/TA1 and P2.4/CA1/TA2
VCC = 2.2 V
VCC = 3 V
VCC = 2.2 V
VCC = 3 V
25
40
µA
45
60
30
50
µA
45
71
V(IC)
Common-mode input
voltage
CAON =1
VCC = 2.2 V/3 V
0
VCC–1 V
V(Ref025)
See Figure 5
Voltage @ 0.25 VCC node
VCC
PCA0=1, CARSEL=1, CAREF=1,
No load at P2.3/CA0/TA1 and
P2.4/CA1/TA2, See Figure 5
VCC = 2.2 V/3 V
0.23 0.24
0.25
V(Ref050)
Voltage @ 0.5 VCC node
See Figure 5
VCC
PCA0=1, CARSEL=1, CAREF=2,
No load at P2.3/CA0/TA1 and
P2.4/CA1/TA2, See Figure 5
VCC = 2.2 V/3 V
0.47 0.48
0.5
V(RefVT)
PCA0=1, CARSEL=1, CAREF=3,
No load at P2.3/CA0/TA1 and
P2.4/CA1/TA2
VCC = 2.2 V
VCC = 3 V
430 550
450 565
645
mV
660
V(offset)
Offset voltage
See Note 18
VCC = 2.2 V/3 V –30
30 mV
Vhys
Input hysteresis
CAON=1
VCC = 2.2 V/3 V
0 0.7
1.4 mV
t(response _LH)
TA = 25°C, Overdrive 10 mV, With-
out filter: CAF=0
TA = 25°C, Overdrive 10 mV, With
filter: CAF=1
VCC = 2.2 V
VCC = 3 V
VCC = 2.2 V
VCC = 3 V
160 210
90 150
1.6 1.9
1.1 1.5
300
ns
200
3.4
µs
2.6
t(response _HL)
TA = 25°C,
Overdrive 10 mV, without filter:
CAF=0
TA = 25°C,
Overdrive 10 mV, with filter: CAF=1
VCC = 2.2 V
VCC = 3 V
VCC = 2.2 V
VCC = 3 V
160 210
90 150
1.6 1.9
1.1 1.5
300
ns
200
3.4
µs
2.6
NOTES: 17. The leakage current for the Comparator_A terminals is identical to Ilkg(Px.x) specification.
18. The input offset voltage can be cancelled by using the CAEX bit to invert the Comparator_A inputs on successive measurements.
The two successive measurements are then summed together.
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