ADS5404 Datasheet, PDF (31/40 Pages) Texas Instruments – Dual Channel 12-Bit 500Msps Analog-to-Digital Converter

ADS5404
www.ti.com
SLAS945 – APRIL 2013
Register
Address
Register Data
A7-A0 in D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
hex
E
Sync Select
D15-D2
0000 0000 0000 00
0101 0101 0101 01
1010 1010 1010 10
1111 1111 1111 11
Sync Select
Default 1010 1010
1010 10
Sync selection for the clock generator block (also
need to see address 0x0F)
Sync is disabled
Sync is set to one shot (one time synchronization only)
Sync is derived from SYNC input pins
not supported
Register
Address
Register Data
A7-A0 in D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
hex
F
Sync Select
0
0
0
0
0
VREF Sel
0
0
0
0
D15-D12
0000
0101
1010
1111
D6-D4
000
001
010
011
100
Others
Sync Select
Default 1010
Sync selection for the clock generator block
Sync is disabled
Sync is set to one shot (one time synchronization only)
Sync is derived from SYNC input pins
not supported
VREF SEL
Default 000
1.0V
1.25V
0.9V
0.8V
1.15V
external reference
Internal voltage reference selection
Register
Address
Register Data
A7-A0 in D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
hex
1A
0 Start 0
0
1
0
1
1
0
0
0
1
1
0
0
0
Auto
Corr
ChB
D14
0
1
D11, 9, 8, 4, 3
Start Auto Corr ChB
Default 1
Starts DC offset and gain correction loop for ChB
Starts the DC offset and gain correction loops
Clears DC offset correction value to 0 and gain value to 1
Must be set to 1 for maximum performance
Default 1
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