TPS54620_1002 Datasheet, PDF (30/36 Pages) Texas Instruments – 4.5V to 17V Input, 6A Synchronous Step Down SWIFT™ Converter

TPS54620
SLVS949A – MAY 2009 – REVISED JANUARY 2010
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low ESR ceramic capacitor with X5R or X7R dielectric. Make sure to connect this capacitor to the quite analog
ground trace rather than the power ground trace of the PVIn bypass capacitor. Since the PH connection is the
switching node, the output inductor should be located close to the PH pins, and the area of the PCB conductor
minimized to prevent excessive capacitive coupling. The output filter capacitor ground should use the same
power ground trace as the PVIN input bypass capacitor. Try to minimize this conductor length while maintaining
adequate width. The small signal components should be grounded to the analog ground path as shown. The
RT/CLK pin is sensitive to noise so the RT resistor should be located as close as possible to the IC and routed
with minimal lengths of trace. The additional external components can be placed approximately as shown. It may
be possible to obtain acceptable performance with alternate PCB layouts, however this layout has been shown to
produce good results and is meant as a guideline.
Land pattern and stencil information is provided in the data sheet addendum. The dimension and outline
information is for the standard RGY (S-PVQFN-N14) package. There may be slight differences between the
provided data and actual lead frame used on the TPS54620RGY package.
TOPSIDE
GROUND
AREA
PVIN
INPUT
BYPASS
CAPACITOR
FREQUENCY SET RESISTOR
OUTPUT
FILTER
CAPACITOR
RT/CLK
PWRGD
GND
GND
PVIN
PVIN
VIN
EXPOSED THERMAL
PAD AREA
BOOT
PH
PH
EN
SS/TR
BOOT
CAPACITOR
OUTPUT
INDUCTOR
PH
VOUT
PVIN
VSENSE
COMP
VIN
VIN
INPUT
BYPASS
CAPACITOR
FEEDBACK
RESISTORS
SLOW START
CAPACITOR
UVLO SET
RESISTORS
COMPENSATION
NETWORK
ANALOG GROUND TRACE
0.010 in. Diameter
Thermal VIA to Ground Plane
VIA to Ground Plane
Etch Under Component
Figure 56. PCB Layout
30
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