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CC2480 Datasheet, PDF (30/44 Pages) Texas Instruments – Z-Accel 2.4 GHz ZigBee® Processor | |||
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CC2480
10.1 IEEE 802.15.4 Modulation Format
This section is meant as an introduction to the
2.4 GHz direct sequence spread spectrum
(DSSS) RF modulation format defined in IEEE
802.15.4. For a complete description, please
refer to [1].
The modulation and spreading functions are
illustrated at block level in Figure 10 [1]. Each
byte is divided into two symbols, 4 bits each.
The least significant symbol is transmitted first.
For multi-byte fields, the least significant byte
is transmitted first.
Each symbol is mapped to one out of 16
pseudo-random sequences, 32 chips each.
The symbol to chip mapping is shown in Table
20. The chip sequence is then transmitted at 2
MChips/s, with the least significant chip (C0)
transmitted first for each symbol.
Transmitted
bit-stream
(LSB first)
Bit-to-
Symbol
Symbol-
to-Chip
O-QPSK
Modulator
Modulated
Signal
Figure 10: Modulation and spreading functions [1]
The modulation format is Offset â Quadrature
Phase Shift Keying (O-QPSK) with half-sine
chip shaping. This is equivalent to MSK
modulation. Each chip is shaped as a half-
sine, transmitted alternately in the I and Q
channels with one half chip period offset. This
is illustrated for the zero-symbol in Figure 11.
Table 20: IEEE 802.15.4 symbol-to-chip mapping [1]
Symbol Chip sequence (C0, C1, C2, ⦠, C31)
0
11011001110000110101001000101110
1
11101101100111000011010100100010
2
00101110110110011100001101010010
3
00100010111011011001110000110101
4
01010010001011101101100111000011
5
00110101001000101110110110011100
6
11000011010100100010111011011001
7
10011100001101010010001011101101
8
10001100100101100000011101111011
9
10111000110010010110000001110111
10
01111011100011001001011000000111
11
01110111101110001100100101100000
12
00000111011110111000110010010110
13
01100000011101111011100011001001
14
10010110000001110111101110001100
15
11001001011000000111011110111000
CC2480 Data Sheet SWRS074
Page 30 of 43
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