AMC6821SDBQG4 Datasheet, PDF (30/56 Pages) Texas Instruments – Intelligent Temperature Monitor and PWM Fan Controller

AMC6821
SBAS386C – MAY 2006 – REVISED JULY 2007
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INTERRUPT
The AMC6821 provides two interrupt output pins, OVR and SMBALERT.
OVR Pin
OVR is an open-drain output pin that works as an over-critical temperature limit (shutdown threshold) indicator
and remote sensor failure indicator. This architecture is shown in Figure 30. Setting the OVREN bit of
Configuration Register 4 to '1' enables this pin; clearing OVREN ('0') disables it. When disabled, the OVR pin is
in a high-impedance status. When enabled, the status is controlled by the over-critical temperature flag and
remote sensor failure flag bits of the Status Registers.
When the temperature is over the critical limit (shutdown threshold), the corresponding over-critical limit flag of
the Status Register (RTC for the remote channel and LTC for the local channel) is set ('1'). This flag is cleared
('0') when reading the Status Registers. Once cleared, this bit is not reasserted until the temperature falls 5°C
below the exceeded critical limit, even if the over-critical limit condition persists. When the temperature is equal to
or above the critical temperature limit, the OVR pin is asserted (active low) to indicate this critical condition. As
the over-critical temperature limit indicator, the OVR pin remains low once asserted until the measured
temperature falls 5°C below the exceeded critical limit.
LTC Bit
(Local temperature reaches the critcal shutdown threshold.)
Local Temperature < (Local-Critical-Temp - 5°C)
Latch
Set
Output
Reset
RTC Bit
(Remote temperature reaches the critcal shutdown threshold.)
Remote Temperature < (Remote-Critical-Temp - 5°C)
Latch
Set
Output
Reset
RTF
(Remote Temperature Sensor Failure)
OVREN
AMC6821
+V
OVR
Figure 30. OVR Pin
When a remote temperature sensor failure condition is detected (either short-circuit or open-circuit), the remote
temperature sensor failure bit (RTF) in Status Register 1 (bit 5, 0x02) is set ('1') and the OVR pin is forced low no
matter what the status of RTFIE is. This value indicates a remote sensor failure condition. Once this condition
occurs, the RTF bit remains '1' and the OVR pin stays low until a power-on reset or software reset is issued,
regardless if the failure condition continues thereafter. RTF = 1 also generates an RTF interrupt through the
SMBALERT pin when RTFIE = 1.
SMBALERT Pin
The SMBALERT pin is a standard interrupt output defined by SMBus specification revision 2.0. This pin is an
open-drain output pin and is illustrated in Figure 33.
SMBALERT Interrupt Behavior
When an out-of-limit event occurs, the proper flag bits in the status registers are set ('1'), and the corresponding
interrupts are generated, if enabled. When an interrupt is generated, the SMBALERT pin asserts low. The host
can poll the device status registers to get the information, or give a response to the SMBALERT interrupt signal.
It is important to note how the SMBALERT output and status bits behave when writing interrupt-handler software.
Figure 31 shows how the SMBALERT output and status bits behave.
30
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