 English |
|
|
|
|
|
|
|
| TPS62350_07 Datasheet, PDF (3/46 Pages) Texas Instruments – 800-mA, 3-MHz SYNCHRONOUS STEP-DOWN CONVERTER WITH I2C™ COMPATIBLE INTERFACE IN CHIP SCALE PACKAGING | |||
| |||
| ◁ |
www.ti.com
DISSIPATION RATINGS(1)
TPS62350, TPS62351
TPS62352, TPS62353, TPS62354
SLVS540B â MAY 2006 â REVISED DECEMBER 2006
PACKAGE
DRC
YZG
RθJA (2)
49°C/W
110°C/W
POWER RATING
FOR TA ⤠25°C
2050 mW
900 mW
DERATING FACTOR
ABOVE TA = 25°C
21 mW/°C
9 mW/°C
(1) Maximum power dissipation is a function of TJ(max), θJA and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = [TJ(max) â TA] / θJA.
(2) This thermal data is measured with high-K board (4 layers board according to JESD51-7 JEDEC standard).
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply with
VI = 3.6 V, EN = VI, VSEL = VI, SYNC = GND, VSEL0[6] bit = 1.
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
SUPPLY CURRENT
IO = 0 mA, Fast PFM mode enabled
Device not switching
110
150 µA
IQ
Operating quiescent current
IO = 0 mA, Light PFM mode enabled
Device not switching
28
45 µA
I(SD)
Shutdown current
V(UVLO) Undervoltage lockout threshold
ENABLE, VSEL, SDA, SCL, SYNC
IO = 0 mA, 3-MHz PWM mode operation
EN = GND, EN_DCDC bit = X
EN = VI, EN_DCDC bit = 0
4.8
mA
0.1
2 µA
6.5
µA
2.20
2.3
V
VIH
High-level input voltage
VIL
Low-level input voltage
Ilkg
Input leakage current
POWER SWITCH
Input tied to GND or VI
1.2
V
0.4
V
0.01
1 µA
rDS(on) P-channel MOSFET on resistance
Ilkg
P-channel leakage current
rDS(on) N-channel MOSFET on resistance
Ilkg
R(DIS)
N-channel leakage current
Discharge resistor for power-down sequence
P-MOS current limit
N-MOS current limit
Sourcing
Sinking
Input current limit under short-circuit conditions
Thermal shutdown
VI = V(GS) = 3.6 V, YZG package
VI = V(GS) = 3.6 V, DRC package
VI = V(GS) = 2.7 V, DRC package
V(DS) = 6 V
VI = V(GS) = 3.6 V, YZG package
VI = V(GS) = 3.6 V, DRC package
VI = V(GS) = 2.7 V, DRC package
V(DS) = 6 V
2.7 V ⤠VI ⤠5.5 V
2.7 V ⤠VI ⤠5.5 V
2.7 V ⤠VI ⤠5.5 V
VO = 0 V
1150
900
-500
250
500
275
500 mâ¦
350
750
1 µA
150
350
165
350 mâ¦
210
500
1 µA
15
50
â¦
1350 1600 mA
1100 1300 mA
-700 -900 mA
675
mA
150
°C
Thermal shutdown hysteresis
20
°C
OSCILLATOR
fSW
f(SYNC)
Oscillator frequency
Synchronization range
Duty cycle of external clock signal
CONTROL2[4:3] = 00
2.65
2.65
20%
3 3.35 MHz
3.35 MHz
80%
Submit Documentation Feedback
3
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese