TMS27C210A Datasheet, PDF (3/15 Pages) Texas Instruments – PROGRAMMABLE READ-ONLY MEMORIES

TMS27C210A 65536 BY 16-BIT UV ERASABLE
TMS27PC210A 65536 BY 16-BIT
PROGRAMMABLE READ-ONLY MEMORIES
SMLS310D– NOVEMBER 1990 – REVISED SEPTEMBER 1997
Table 2. Operation Modes
FUNCTION
E
G
PGM
VPP
VCC
A9
A0
READ
VIL
VIL
X
VCC
VCC
X
X
OUTPUT
DISABLE
VIL
VIH
X
VCC
VCC
X
X
STANDBY
VIH
X
X
VCC
VCC
X
X
MODE†
PROGRAMMING
VIL
VIH
VIL
VPP
VCC
X
X
VERIFY
VIL
VIL
VIH
VPP
VCC
X
X
PROGRAM
INHIBIT
VIH
X
X
VPP
VCC
X
X
DQ0 – DQ15 Data Out
Hi-Z
Hi-Z
† _{X can be VIL or VIH.}
‡ _{VH = 12 V ± 0.5 V.}
Data In
Data Out
Hi-Z
SIGNATURE MODE
VIL
VIL
X
VCC
VCC
VH‡
VH‡
VIL
VIH
CODE
MFG
DEVICE
97
AB
read/output disable
When the outputs of two or more TMS27C210As or TMS27PC210As are connected in parallel on the same bus,
the output of any particular device in the circuit can be read with no interference from competing outputs of the
other devices. To read the output of a single device, a low level signal is applied to the E and G pins. All other
devices in the circuit must have their outputs disabled by applying a high level signal to one of these pins.
latchup immunity
Latchup immunity on the TMS27C210A and TMS27PC210A is a minimum of 250 mA on all inputs and outputs.
This feature provides latchup immunity beyond any potential transients at the P.C. board level when the EPROM
is interfaced to industry standard TTL or MOS logic devices. The input / output layout approach controls latchup
without compromising performance or packing density.
For more information see application report SMLA001, “Design Considerations; Latchup Immunity of the
HVCMOS EPROM Family”, available through TI Sales Offices.
power down
Active I_CC supply current can be reduced from 50 mA to 500 µA by applying a high TTL input on E and to
100 µA by applying a high CMOS input on E. In this mode all outputs are in the high-impedance state.
erasure (TMS27C210A)
Before programming, the TMS27C210A is erased by exposing the chip through the transparent lid to a high
intensity ultraviolet light (wavelength 2537 Å). The recommended minimum exposure dose (UV intensity ×
exposure time) is 15-W•s / cm². A typical 12-mW / cm², filterless UV lamp erases the device in 21 minutes. The
lamp should be located about 2.5 cm above the chip during erasure. After erasure, all bits are in the high state.
Normal ambient light contains the correct wavelength for erasure; therefore, when using the TMS27C210A the
window should be covered with an opaque label.
initializing (TMS27PC210A)
The OTP TMS27PC210A PROM is provided with all bits in the logic high state then logic lows are programmed
into the desired locations. Logic lows programmed into an OTP PROM cannot be erased.
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