TLC2932 Datasheet, PDF (3/24 Pages) Texas Instruments – HIGH-PERFORMANCE PHASE-LOCKED LOOP

TLC2932
HIGH-PERFORMANCE PHASE-LOCKED LOOP
SLAS097E – SEPTEMBER 1994 – REVISED MAY 1997
VCO output frequency 1/2 divider
The TLC2932 SELECT terminal sets the f_osc or 1/2 f_osc VCO output frequency as shown in Table 1. The 1/2
f_osc output should be used for minimum VCO output jitter.
Table 1. VCO Output 1/2 Divider Function
SELECT
Low
High
VCO OUTPUT
fosc
1/2 fosc
VCO inhibit function
The VCO has an externally controlled inhibit function which inhibits the VCO output. A high level on the VCO
INHIBIT terminal stops the VCO oscillation and powers down the VCO. The output maintains a low level during
the power-down mode, refer to Table 2.
Table 2. VCO Inhibit Function
VCO INHIBIT
Low
High
VCO OSCILLATOR
Active
Stopped
VCO OUTPUT
Active
Low level
IDD(VCO)
Normal
Power Down
PFD operation
The PFD is a high-speed, edge-triggered detector with an internal charge pump. The PFD detects the phase
difference between two frequency inputs supplied to FIN–A and FIN–B as shown in Figure 2. Nominally the
reference is supplied to FIN–A, and the frequency from the external counter output is fed to FIN–B.
FIN– A
FIN– B
PFD OUT
VOH
Hi-Z
VOL
Figure 2. PFD Function Timing Chart
PFD output control
A high level on the PFD INHIBIT terminal places the PFD output in the high-impedance state and the PFD stops
phase detection as shown in Table 3. A high level on the PFD INHIBIT terminal also can be used as the
power-down mode for the PFD.
Table 3. VCO Output Control Function
PFD INHIBIT
Low
High
DETECTION
Active
Stopped
PFD OUTPUT
Active
Hi-Z
IDD(PFD)
Normal
Power Down
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