SN74GTLPH16912_07 Datasheet, PDF (3/18 Pages) Texas Instruments – 18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER

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SN74GTLPH16912
18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SCES288C – OCTOBER 1999 – REVISED JUNE 2005
FUNCTIONAL DESCRIPTION
The SN74GTLPH16912 is a medium-drive (50-mA), 18-bit UBT transceiver containing D-type latches and D-type
flip-flops for data-path operation in transparent, latched, clocked, or clock-enabled modes and can replace any of
the functions shown in Table 1. Data polarity is noninverting.
Table 1. SN74GTLPH16912 UBT Transceiver Replacement Functions
FUNCTION
8 BIT
9 BIT 10 BIT
16 BIT
Transceiver
'245, '623, '645
'863
'861
'16245, '16623
Buffer/driver
'241, '244, '541
'827
'16241, '16244, '16541
Latched transceiver
'543
'16543
Latch
'373, '573
'843
'841
'16373
Registered transceiver
'646, '652
'16646, '16652
Flip-flop
'374, '574
'821
'16374
Standard UBT
Universal bus driver
Registered transceiver with clock enable
'2952
'16470, '16952
Flip-flop with clock enable
'377
'823
Standard UBT with clock enable
SN74GTLPH16912 UBT transceiver replaces all above functions
18 BIT
'16863
'16825
'16472
'16843
'16474
'16500, '16501
'16835
'16823
'16600, '16601
Data flow in each direction is controlled by clock enables (CEAB and CEBA), latch enables (LEAB and LEBA),
clock (CLKAB and CLKBA), and output enables (OEAB and OEBA). CEAB and CEBA and OEAB and OEBA
control the 18 bits of data for the A-to-B and B-to-A directions, respectively.
For A-to-B data flow, when CEAB is low, the device operates on the low-to-high transition of CLKAB for the
flip-flop and on the high-to-low transition of LEAB for the latch path, i.e., if CEAB and LEAB are low, the A data is
latched, regardless of the state of CLKAB (high or low). If LEAB is high, the device is in transparent mode. When
OEAB is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state.
The data flow for B to A is similar to that of A to B, except CEBA, OEBA, LEBA, and CLKBA are used.
CEAB
X
L
L
X
X
L
L
H
OEAB
H
L
L
L
L
L
L
L
INPUTS
LEAB
X
L
L
H
H
L
L
L
FUNCTION TABLE⁽¹⁾
CLKAB
A
X
X
H
X
L
X
X
L
X
H
↑
L
↑
H
X
X
OUTPUT
B
Z
B₀ ⁽²⁾
B₀ ⁽³⁾
L
H
L
H
B₀ ⁽³⁾
MODE
Isolation
Latched storage of A data
True transparent
Clocked storage of A data
Clock inhibit
(1) A-to-B data flow is shown. B-to-A data flow is similar, but uses CEBA, OEBA, LEBA, and CLKBA.
The condition when OEAB and OEBA are both low at the same time is not recommended.
(2) Output level before the indicated steady-state input conditions were established, provided that
CLKAB was high before LEAB went low
(3) Output level before the indicated steady-state input conditions were established
3