SN74GTL2007 Datasheet, PDF (3/10 Pages) Texas Instruments – 12-BIT GTL-/GTL/GTL+ TO LVTTL TRANSLATOR

logic symbol
GTL V_REF
1
1AO
2
LVTTL OUTPUTS
2AO
3
5A (OPEN DRAIN)
4
LVTTL I/O
6A (OPEN DRAIN)
5
LVTTL INPUT EN1
6
GTL INPUT 11BI
7
LVTTL I/O 11A (OPEN DRAIN)
8
GTL INPUT 9BI
9
3AO
10
LVTTL OUTPUTS
4AO
11
SN74GTL2007
12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR
SCLS609 − MARCH 2005
GTL2007
DELAY¹
DELAY¹
27
1BI
GTL
26
INPUTS
2BI
25
7BO1
GTL
24
OUTPUTS
7BO2
23
EN2 LVTTL INPUT
22
11BO GTL OUTPUT
21
5BI
20
6BI
GTL
19
INPUTS
3BI
18
4BI
10AI1
12
LVTTL INPUTS
10AI2
13
17
10BO1
GTL
16
OUTPUTS
10BO2
15
9AO LVTTL OUTPUT
NOTE A: The enable on 7BO1/7BO2 includes a delay that prevents a transient conditon (where 5BI/6BI go from low to high, and the low to high
on 5A/6A lags up to 100 ns) from causing a low glitch on the 7BO1/7BO2 outputs.
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