SN74CBTD3306DR Datasheet, PDF (3/12 Pages) Texas Instruments – DUAL FET BUS SWITCH WITH LEVEL SHIFTING

SN74CBTD3306
DUAL FET BUS SWITCH
WITH LEVEL SHIFTING
SCDS030L − JANUARY 1996 − REVISED JANUARY 2004
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature range, C_L = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN MAX UNIT
t_pd†
A or B
B or A
0.25 ns
t_en
OE
A or B
2.1 5.4 ns
t_dis
OE
A or B
1 4.7 ns
† _{The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when}
driven by an ideal voltage source (zero output impedance).
From Output
Under Test
C_L = 50 pF
(see Note A)
PARAMETER MEASUREMENT INFORMATION
7V
500 Ω ^S1
Open
GND
500 Ω
TEST
t_pd
t_PLZ/t_PZL
t_PHZ/t_PZH
S1
Open
7V
Open
LOAD CIRCUIT
Input
1.5 V
3V
1.5 V
0V
t_PLH
t_PHL
Output
1.5 V
V_OH
1.5 V
V_OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Output
Control
1.5 V
3V
1.5 V
0V
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
t_PZL
t_PZH
1.5 V
1.5 V
t_PLZ
3.5 V
V_OL + 0.3 V
V_OL
t_PHZ
V_OH
V_OH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C_L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r ≤ 2.5 ns, t_f ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. t_PHL and t_PLH are the same as t_pd.
Figure 1. Load Circuit and Voltage Waveforms
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3