SN74CBTD1G384 Datasheet, PDF (3/5 Pages) Texas Instruments – SINGLE FET BUS SWITCH WITH LEVEL SHIFTING

SN74CBTD1G384
SINGLE FET BUS SWITCH
WITH LEVEL SHIFTING
SCDS066J – JULY 1998 – REVISED JANUARY 2003
switching characteristics over recommended operating free-air temperature range, C_L = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN MAX UNIT
tpd^†
A or B
B or A
0.25 ns
ten
OE
A or B
2 5.9 ns
tdis
OE
A or B
1 4.7 ns
† _{The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when}
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω ^S1
500 Ω
7V
Open
GND
TEST
tpd
tPLZ/tPZL
tPHZ/tPZH
S1
Open
7V
Open
LOAD CIRCUIT
Output
Control
(low-level
enabling)
3V
1.5 V
1.5 V
0V
Input
1.5 V
3V
1.5 V
0V
tPLH
tPHL
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V
VOH
VOL
Output
Waveform 1
S1 at 7 V
(see Note B)
tPZL
1.5 V
tPLZ
3.5 V
VOL + 0.3 V
VOL
tPZH
Output
Waveform 2
S1 at Open
(see Note B)
1.5 V
tPHZ
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The output is measured with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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